119 			          4 * device->physical_device->rad_info.num_good_compute_units *  in radv_pipeline_scratch_init()
819 	unsigned num_tile_pipes = pipeline->device->physical_device->rad_info.num_tile_pipes;  in radv_pipeline_init_multisample_state()
848 …_0 = S_028A48_ALTERNATE_RBS_PER_TILE(pipeline->device->physical_device->rad_info.chip_class >= GFX…  in radv_pipeline_init_multisample_state()
1307 	unsigned num_se = device->physical_device->rad_info.max_se;  in calculate_gs_ring_sizes()
1316 	if (pipeline->device->physical_device->rad_info.chip_class >= GFX9)   in calculate_gs_ring_sizes()
1336 	if (pipeline->device->physical_device->rad_info.chip_class <= VI)  in calculate_gs_ring_sizes()
1350 	if (device->physical_device->rad_info.family == CHIP_BONAIRE ||  in si_multiwave_lds_size_workaround()
1351 	    device->physical_device->rad_info.family == CHIP_KABINI ||  in si_multiwave_lds_size_workaround()
1352 	    device->physical_device->rad_info.family == CHIP_MULLINS)  in si_multiwave_lds_size_workaround()
1416 	hardware_lds_size = pipeline->device->physical_device->rad_info.chip_class >= CIK ? 65536 : 32768;  in calculate_tess_state()
1430 	if (pipeline->device->physical_device->rad_info.chip_class == SI) {  in calculate_tess_state()
1440 	if (pipeline->device->physical_device->rad_info.chip_class >= CIK) {  in calculate_tess_state()
1513 		if (pipeline->device->physical_device->rad_info.family == CHIP_FIJI ||  in calculate_tess_state()
1514 		    pipeline->device->physical_device->rad_info.family >= CHIP_POLARIS10)  in calculate_tess_state()
1568 				       pipeline->device->physical_device->rad_info.chip_class);  in calculate_vgt_gs_mode()
1778 	if (pipeline->device->physical_device->rad_info.chip_class < VI)  in radv_generate_graphics_pipeline_key()
1986 	if (device->physical_device->rad_info.chip_class >= GFX9 && modules[MESA_SHADER_TESS_CTRL]) {  in radv_create_shaders()
1999 	if (device->physical_device->rad_info.chip_class >= GFX9 && modules[MESA_SHADER_GEOMETRY]) {  in radv_create_shaders()
2325 	    util_logbase2_ceil(pipeline->device->physical_device->rad_info.num_render_backends /  in radv_compute_bin_size()
2326 	                       pipeline->device->physical_device->rad_info.max_se);  in radv_compute_bin_size()
2327 	unsigned log_num_se = util_logbase2_ceil(pipeline->device->physical_device->rad_info.max_se);  in radv_compute_bin_size()
2395 	switch (pipeline->device->physical_device->rad_info.family) {  in radv_compute_binning_state()
2555 	if (device->physical_device->rad_info.chip_class >= GFX9)  in radv_pipeline_init()
2562 		if (device->physical_device->rad_info.chip_class >= GFX9)  in radv_pipeline_init()
2584 			if (device->physical_device->rad_info.chip_class <= VI)  in radv_pipeline_init()
2593 	if (device->physical_device->rad_info.chip_class >= CIK) {  in radv_pipeline_init()
2598 		if (device->physical_device->rad_info.max_se < 4 ||  in radv_pipeline_init()
2604 		     (device->physical_device->rad_info.family < CHIP_POLARIS10 ||  in radv_pipeline_init()
2627 		if ((device->physical_device->rad_info.family == CHIP_TAHITI ||  in radv_pipeline_init()
2628 		     device->physical_device->rad_info.family == CHIP_PITCAIRN ||  in radv_pipeline_init()
2629 		     device->physical_device->rad_info.family == CHIP_BONAIRE) &&  in radv_pipeline_init()
2635 				if (device->physical_device->rad_info.family == CHIP_TONGA ||  in radv_pipeline_init()
2636 				    device->physical_device->rad_info.family == CHIP_FIJI ||  in radv_pipeline_init()
2637 				    device->physical_device->rad_info.family == CHIP_POLARIS10 ||  in radv_pipeline_init()
2638 				    device->physical_device->rad_info.family == CHIP_POLARIS11 ||  in radv_pipeline_init()
2639 				    device->physical_device->rad_info.family == CHIP_POLARIS12)  in radv_pipeline_init()
2650 		S_028AA8_MAX_PRIMGRP_IN_WAVE(device->physical_device->rad_info.chip_class == VI ? 2 : 0) |  in radv_pipeline_init()
2651 		S_030960_EN_INST_OPT_BASIC(device->physical_device->rad_info.chip_class >= GFX9) |  in radv_pipeline_init()
2652 		S_030960_EN_INST_OPT_ADV(device->physical_device->rad_info.chip_class >= GFX9);  in radv_pipeline_init()
2691 …i] = radv_pipeline_stage_to_user_data_0(pipeline, i, device->physical_device->rad_info.chip_class);  in radv_pipeline_init()
2802 …_stage_to_user_data_0(pipeline, MESA_SHADER_COMPUTE, device->physical_device->rad_info.chip_class);  in radv_compute_pipeline_create()