Lines Matching refs:QPU_MASK
30 #ifndef QPU_MASK
31 #define QPU_MASK(high, low) ((((uint64_t)1<<((high)-(low)+1))-1)<<(low)) macro
47 #define VC5_QPU_OP_MUL_MASK QPU_MASK(63, 58)
50 #define VC5_QPU_SIG_MASK QPU_MASK(57, 53)
53 #define VC5_QPU_COND_MASK QPU_MASK(52, 46)
56 #define VC5_QPU_MM QPU_MASK(45, 45)
57 #define VC5_QPU_MA QPU_MASK(44, 44)
60 #define V3D_QPU_WADDR_M_MASK QPU_MASK(43, 38)
63 #define VC5_QPU_BRANCH_ADDR_LOW_MASK QPU_MASK(55, 35)
66 #define V3D_QPU_WADDR_A_MASK QPU_MASK(37, 32)
69 #define VC5_QPU_BRANCH_COND_MASK QPU_MASK(34, 32)
72 #define VC5_QPU_BRANCH_ADDR_HIGH_MASK QPU_MASK(31, 24)
75 #define VC5_QPU_OP_ADD_MASK QPU_MASK(31, 24)
78 #define VC5_QPU_MUL_B_MASK QPU_MASK(23, 21)
81 #define VC5_QPU_BRANCH_MSFIGN_MASK QPU_MASK(22, 21)
84 #define VC5_QPU_MUL_A_MASK QPU_MASK(20, 18)
87 #define VC5_QPU_ADD_B_MASK QPU_MASK(17, 15)
90 #define VC5_QPU_BRANCH_BDU_MASK QPU_MASK(17, 15)
92 #define VC5_QPU_BRANCH_UB QPU_MASK(14, 14)
95 #define VC5_QPU_ADD_A_MASK QPU_MASK(14, 12)
98 #define VC5_QPU_BRANCH_BDI_MASK QPU_MASK(13, 12)
101 #define VC5_QPU_RADDR_A_MASK QPU_MASK(11, 6)
104 #define VC5_QPU_RADDR_B_MASK QPU_MASK(5, 0)