Lines Matching refs:packed_inst
706 v3d_qpu_add_unpack(const struct v3d_device_info *devinfo, uint64_t packed_inst, in v3d_qpu_add_unpack() argument
709 uint32_t op = QPU_GET_FIELD(packed_inst, VC5_QPU_OP_ADD); in v3d_qpu_add_unpack()
710 uint32_t mux_a = QPU_GET_FIELD(packed_inst, VC5_QPU_ADD_A); in v3d_qpu_add_unpack()
711 uint32_t mux_b = QPU_GET_FIELD(packed_inst, VC5_QPU_ADD_B); in v3d_qpu_add_unpack()
712 uint32_t waddr = QPU_GET_FIELD(packed_inst, V3D_QPU_WADDR_A); in v3d_qpu_add_unpack()
832 instr->alu.add.waddr = QPU_GET_FIELD(packed_inst, V3D_QPU_WADDR_A); in v3d_qpu_add_unpack()
835 if (packed_inst & VC5_QPU_MA) { in v3d_qpu_add_unpack()
856 v3d_qpu_mul_unpack(const struct v3d_device_info *devinfo, uint64_t packed_inst, in v3d_qpu_mul_unpack() argument
859 uint32_t op = QPU_GET_FIELD(packed_inst, VC5_QPU_OP_MUL); in v3d_qpu_mul_unpack()
860 uint32_t mux_a = QPU_GET_FIELD(packed_inst, VC5_QPU_MUL_A); in v3d_qpu_mul_unpack()
861 uint32_t mux_b = QPU_GET_FIELD(packed_inst, VC5_QPU_MUL_B); in v3d_qpu_mul_unpack()
921 instr->alu.mul.waddr = QPU_GET_FIELD(packed_inst, V3D_QPU_WADDR_M); in v3d_qpu_mul_unpack()
922 instr->alu.mul.magic_write = packed_inst & VC5_QPU_MM; in v3d_qpu_mul_unpack()