608 #define STORE(x,y)  _mm256_store_si256((VREG*)(x),(y))  macro
618 #define STORE(x,y)  _mm_store_si128((VREG*)(x),(y))  macro
703         STORE(tmp + PARALLEL_COLS_53 * (i + 0), s0c_0);  in opj_idwt53_v_cas0_mcols_SSE2_OR_AVX2()
704         STORE(tmp + PARALLEL_COLS_53 * (i + 0) + VREG_INT_COUNT, s0c_1);  in opj_idwt53_v_cas0_mcols_SSE2_OR_AVX2()
707         STORE(tmp + PARALLEL_COLS_53 * (i + 1) + 0,  in opj_idwt53_v_cas0_mcols_SSE2_OR_AVX2()
709         STORE(tmp + PARALLEL_COLS_53 * (i + 1) + VREG_INT_COUNT,  in opj_idwt53_v_cas0_mcols_SSE2_OR_AVX2()
713     STORE(tmp + PARALLEL_COLS_53 * (i + 0) + 0, s0n_0);  in opj_idwt53_v_cas0_mcols_SSE2_OR_AVX2()
714     STORE(tmp + PARALLEL_COLS_53 * (i + 0) + VREG_INT_COUNT, s0n_1);  in opj_idwt53_v_cas0_mcols_SSE2_OR_AVX2()
721         STORE(tmp + PARALLEL_COLS_53 * (len - 1), tmp_len_minus_1);  in opj_idwt53_v_cas0_mcols_SSE2_OR_AVX2()
723         STORE(tmp + PARALLEL_COLS_53 * (len - 2),  in opj_idwt53_v_cas0_mcols_SSE2_OR_AVX2()
729         STORE(tmp + PARALLEL_COLS_53 * (len - 1) + VREG_INT_COUNT,  in opj_idwt53_v_cas0_mcols_SSE2_OR_AVX2()
732         STORE(tmp + PARALLEL_COLS_53 * (len - 2) + VREG_INT_COUNT,  in opj_idwt53_v_cas0_mcols_SSE2_OR_AVX2()
737         STORE(tmp + PARALLEL_COLS_53 * (len - 1) + 0,  in opj_idwt53_v_cas0_mcols_SSE2_OR_AVX2()
739         STORE(tmp + PARALLEL_COLS_53 * (len - 1) + VREG_INT_COUNT,  in opj_idwt53_v_cas0_mcols_SSE2_OR_AVX2()
784     STORE(tmp + PARALLEL_COLS_53 * 0, ADD(LOADU(in_even + 0), dc_0));  in opj_idwt53_v_cas1_mcols_SSE2_OR_AVX2()
790     STORE(tmp + PARALLEL_COLS_53 * 0 + VREG_INT_COUNT,  in opj_idwt53_v_cas1_mcols_SSE2_OR_AVX2()
804         STORE(tmp + PARALLEL_COLS_53 * i, dc_0);  in opj_idwt53_v_cas1_mcols_SSE2_OR_AVX2()
805         STORE(tmp + PARALLEL_COLS_53 * i + VREG_INT_COUNT, dc_1);  in opj_idwt53_v_cas1_mcols_SSE2_OR_AVX2()
808         STORE(tmp + PARALLEL_COLS_53 * (i + 1) + 0,  in opj_idwt53_v_cas1_mcols_SSE2_OR_AVX2()
810         STORE(tmp + PARALLEL_COLS_53 * (i + 1) + VREG_INT_COUNT,  in opj_idwt53_v_cas1_mcols_SSE2_OR_AVX2()
818     STORE(tmp + PARALLEL_COLS_53 * i, dc_0);  in opj_idwt53_v_cas1_mcols_SSE2_OR_AVX2()
819     STORE(tmp + PARALLEL_COLS_53 * i + VREG_INT_COUNT, dc_1);  in opj_idwt53_v_cas1_mcols_SSE2_OR_AVX2()
829         STORE(tmp + PARALLEL_COLS_53 * (len - 2) + 0,  in opj_idwt53_v_cas1_mcols_SSE2_OR_AVX2()
831         STORE(tmp + PARALLEL_COLS_53 * (len - 2) + VREG_INT_COUNT,  in opj_idwt53_v_cas1_mcols_SSE2_OR_AVX2()
834         STORE(tmp + PARALLEL_COLS_53 * (len - 1) + 0, dn_0);  in opj_idwt53_v_cas1_mcols_SSE2_OR_AVX2()
835         STORE(tmp + PARALLEL_COLS_53 * (len - 1) + VREG_INT_COUNT, dn_1);  in opj_idwt53_v_cas1_mcols_SSE2_OR_AVX2()
837         STORE(tmp + PARALLEL_COLS_53 * (len - 1) + 0, ADD(s1_0, dc_0));  in opj_idwt53_v_cas1_mcols_SSE2_OR_AVX2()
838         STORE(tmp + PARALLEL_COLS_53 * (len - 1) + VREG_INT_COUNT,  in opj_idwt53_v_cas1_mcols_SSE2_OR_AVX2()
849 #undef STORE