Lines Matching refs:psrl
272 x86_mmx_psrl_d, // llvm.x86.mmx.psrl.d
273 x86_mmx_psrl_q, // llvm.x86.mmx.psrl.q
274 x86_mmx_psrl_w, // llvm.x86.mmx.psrl.w
366 x86_sse2_psrl_d, // llvm.x86.sse2.psrl.d
367 x86_sse2_psrl_dq, // llvm.x86.sse2.psrl.dq
368 x86_sse2_psrl_dq_bs, // llvm.x86.sse2.psrl.dq.bs
369 x86_sse2_psrl_q, // llvm.x86.sse2.psrl.q
370 x86_sse2_psrl_w, // llvm.x86.sse2.psrl.w
799 "llvm.x86.mmx.psrl.d",
800 "llvm.x86.mmx.psrl.q",
801 "llvm.x86.mmx.psrl.w",
893 "llvm.x86.sse2.psrl.d",
894 "llvm.x86.sse2.psrl.dq",
895 "llvm.x86.sse2.psrl.dq.bs",
896 "llvm.x86.sse2.psrl.q",
897 "llvm.x86.sse2.psrl.w",
2071 return Intrinsic::x86_mmx_psrl_d; // "86.mmx.psrl.d"
2073 return Intrinsic::x86_mmx_psrl_q; // "86.mmx.psrl.q"
2075 return Intrinsic::x86_mmx_psrl_w; // "86.mmx.psrl.w"
2586 return Intrinsic::x86_sse2_psrl_d; // "86.sse2.psrl.d"
2588 return Intrinsic::x86_sse2_psrl_q; // "86.sse2.psrl.q"
2590 return Intrinsic::x86_sse2_psrl_w; // "86.sse2.psrl.w"
2996 return Intrinsic::x86_sse2_psrl_dq; // "86.sse2.psrl.dq"
4344 return Intrinsic::x86_sse2_psrl_dq_bs; // "86.sse2.psrl.dq.bs"
5869 case Intrinsic::x86_sse2_psrl_dq: // llvm.x86.sse2.psrl.dq
5870 case Intrinsic::x86_sse2_psrl_dq_bs: // llvm.x86.sse2.psrl.dq.bs
5882 case Intrinsic::x86_sse2_psrl_q: // llvm.x86.sse2.psrl.q
6048 case Intrinsic::x86_sse2_psrl_d: // llvm.x86.sse2.psrl.d
6143 case Intrinsic::x86_sse2_psrl_w: // llvm.x86.sse2.psrl.w
6259 case Intrinsic::x86_mmx_psrl_d: // llvm.x86.mmx.psrl.d
6260 case Intrinsic::x86_mmx_psrl_q: // llvm.x86.mmx.psrl.q
6261 case Intrinsic::x86_mmx_psrl_w: // llvm.x86.mmx.psrl.w
7065 case Intrinsic::x86_sse2_psrl_dq: // llvm.x86.sse2.psrl.dq
7066 case Intrinsic::x86_sse2_psrl_dq_bs: // llvm.x86.sse2.psrl.dq.bs
7082 case Intrinsic::x86_sse2_psrl_q: // llvm.x86.sse2.psrl.q
7320 case Intrinsic::x86_sse2_psrl_d: // llvm.x86.sse2.psrl.d
7453 case Intrinsic::x86_sse2_psrl_w: // llvm.x86.sse2.psrl.w
7591 case Intrinsic::x86_mmx_psrl_d: // llvm.x86.mmx.psrl.d
7592 case Intrinsic::x86_mmx_psrl_q: // llvm.x86.mmx.psrl.q
7593 case Intrinsic::x86_mmx_psrl_w: // llvm.x86.mmx.psrl.w