Lines Matching refs:Idx
276 bool SplitAnalysis::isOriginalEndpoint(SlotIndex Idx) const { in isOriginalEndpoint()
280 LiveInterval::const_iterator I = Orig.find(Idx); in isOriginalEndpoint()
283 if (I != Orig.end() && I->start <= Idx) in isOriginalEndpoint()
284 return I->start == Idx; in isOriginalEndpoint()
287 return I != Orig.begin() && (--I)->end == Idx; in isOriginalEndpoint()
347 SlotIndex Idx) { in defValue() argument
349 assert(Idx.isValid() && "Invalid SlotIndex"); in defValue()
350 assert(Edit->getParent().getVNInfoAt(Idx) == ParentVNI && "Bad Parent VNI"); in defValue()
354 VNInfo *VNI = LI->getNextValue(Idx, 0, LIS.getVNInfoAllocator()); in defValue()
446 void SplitEditor::selectIntv(unsigned Idx) { in selectIntv() argument
447 assert(Idx != 0 && "Cannot select the complement interval"); in selectIntv()
448 assert(Idx < Edit->size() && "Can only select previously opened interval"); in selectIntv()
449 DEBUG(dbgs() << " selectIntv " << OpenIdx << " -> " << Idx << '\n'); in selectIntv()
450 OpenIdx = Idx; in selectIntv()
453 SlotIndex SplitEditor::enterIntvBefore(SlotIndex Idx) { in enterIntvBefore() argument
455 DEBUG(dbgs() << " enterIntvBefore " << Idx); in enterIntvBefore()
456 Idx = Idx.getBaseIndex(); in enterIntvBefore()
457 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Idx); in enterIntvBefore()
460 return Idx; in enterIntvBefore()
463 MachineInstr *MI = LIS.getInstructionFromIndex(Idx); in enterIntvBefore()
466 VNInfo *VNI = defFromParent(OpenIdx, ParentVNI, Idx, *MI->getParent(), MI); in enterIntvBefore()
470 SlotIndex SplitEditor::enterIntvAfter(SlotIndex Idx) { in enterIntvAfter() argument
472 DEBUG(dbgs() << " enterIntvAfter " << Idx); in enterIntvAfter()
473 Idx = Idx.getBoundaryIndex(); in enterIntvAfter()
474 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Idx); in enterIntvAfter()
477 return Idx; in enterIntvAfter()
480 MachineInstr *MI = LIS.getInstructionFromIndex(Idx); in enterIntvAfter()
483 VNInfo *VNI = defFromParent(OpenIdx, ParentVNI, Idx, *MI->getParent(), in enterIntvAfter()
518 SlotIndex SplitEditor::leaveIntvAfter(SlotIndex Idx) { in leaveIntvAfter() argument
520 DEBUG(dbgs() << " leaveIntvAfter " << Idx); in leaveIntvAfter()
523 SlotIndex Boundary = Idx.getBoundaryIndex(); in leaveIntvAfter()
537 if (SpillMode && !SlotIndex::isSameInstr(ParentVNI->def, Idx) && in leaveIntvAfter()
540 defFromParent(0, ParentVNI, Idx, *MI->getParent(), MI); in leaveIntvAfter()
541 return Idx; in leaveIntvAfter()
549 SlotIndex SplitEditor::leaveIntvBefore(SlotIndex Idx) { in leaveIntvBefore() argument
551 DEBUG(dbgs() << " leaveIntvBefore " << Idx); in leaveIntvBefore()
554 Idx = Idx.getBaseIndex(); in leaveIntvBefore()
555 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Idx); in leaveIntvBefore()
558 return Idx.getNextSlot(); in leaveIntvBefore()
562 MachineInstr *MI = LIS.getInstructionFromIndex(Idx); in leaveIntvBefore()
564 VNInfo *VNI = defFromParent(0, ParentVNI, Idx, *MI->getParent(), MI); in leaveIntvBefore()
959 SlotIndex Idx = LIS.getInstructionIndex(MI); in rewriteAssigned() local
961 Idx = MO.isEarlyClobber() ? Idx.getUseIndex() : Idx.getDefIndex(); in rewriteAssigned()
964 unsigned RegIdx = RegAssign.lookup(Idx); in rewriteAssigned()
968 << Idx << ':' << RegIdx << '\t' << *MI); in rewriteAssigned()
980 Idx = Idx.getPrevSlot(); in rewriteAssigned()
981 if (!Edit->getParent().liveAt(Idx)) in rewriteAssigned()
984 Idx = Idx.getUseIndex(); in rewriteAssigned()
986 getLRCalc(RegIdx).extend(LI, Idx.getNextSlot(), LIS.getSlotIndexes(), in rewriteAssigned()
1181 SlotIndex Idx = leaveIntvAtTop(*MBB); in splitLiveThroughBlock() local
1182 assert((!LeaveBefore || Idx <= LeaveBefore) && "Interference"); in splitLiveThroughBlock()
1183 (void)Idx; in splitLiveThroughBlock()
1195 SlotIndex Idx = enterIntvAtEnd(*MBB); in splitLiveThroughBlock() local
1196 assert((!EnterAfter || Idx >= EnterAfter) && "Interference"); in splitLiveThroughBlock()
1197 (void)Idx; in splitLiveThroughBlock()
1225 SlotIndex Idx; in splitLiveThroughBlock() local
1227 Idx = enterIntvBefore(LeaveBefore); in splitLiveThroughBlock()
1228 useIntv(Idx, Stop); in splitLiveThroughBlock()
1230 Idx = enterIntvAtEnd(*MBB); in splitLiveThroughBlock()
1233 useIntv(Start, Idx); in splitLiveThroughBlock()
1234 assert((!LeaveBefore || Idx <= LeaveBefore) && "Interference"); in splitLiveThroughBlock()
1235 assert((!EnterAfter || Idx >= EnterAfter) && "Interference"); in splitLiveThroughBlock()
1248 SlotIndex Idx = enterIntvAfter(EnterAfter); in splitLiveThroughBlock() local
1249 useIntv(Idx, Stop); in splitLiveThroughBlock()
1250 assert((!EnterAfter || Idx >= EnterAfter) && "Interference"); in splitLiveThroughBlock()
1253 Idx = leaveIntvBefore(LeaveBefore); in splitLiveThroughBlock()
1254 useIntv(Start, Idx); in splitLiveThroughBlock()
1255 assert((!LeaveBefore || Idx <= LeaveBefore) && "Interference"); in splitLiveThroughBlock()
1301 SlotIndex Idx = leaveIntvAfter(BI.LastInstr); in splitRegInBlock() local
1302 useIntv(Start, Idx); in splitRegInBlock()
1303 assert((!LeaveBefore || Idx <= LeaveBefore) && "Interference"); in splitRegInBlock()
1307 SlotIndex Idx = leaveIntvBefore(LSP); in splitRegInBlock() local
1308 overlapIntv(Idx, BI.LastInstr); in splitRegInBlock()
1309 useIntv(Start, Idx); in splitRegInBlock()
1310 assert((!LeaveBefore || Idx <= LeaveBefore) && "Interference"); in splitRegInBlock()
1387 SlotIndex Idx = enterIntvBefore(std::min(LSP, BI.FirstInstr)); in splitRegOutBlock() local
1388 useIntv(Idx, Stop); in splitRegOutBlock()
1389 assert((!EnterAfter || Idx >= EnterAfter) && "Interference"); in splitRegOutBlock()
1403 SlotIndex Idx = enterIntvAfter(EnterAfter); in splitRegOutBlock() local
1404 useIntv(Idx, Stop); in splitRegOutBlock()
1405 assert((!EnterAfter || Idx >= EnterAfter) && "Interference"); in splitRegOutBlock()
1408 SlotIndex From = enterIntvBefore(std::min(Idx, BI.FirstInstr)); in splitRegOutBlock()
1409 useIntv(From, Idx); in splitRegOutBlock()