266   void ClobberSharingStackSlots(int StackSlot);
838 void AvailableSpills::ClobberSharingStackSlots(int StackSlot) {  in ClobberSharingStackSlots()  argument
840     SpillSlotsOrReMatsAvailable.find(StackSlot);  in ClobberSharingStackSlots()
848     if (I->second != StackSlot) {  in ClobberSharingStackSlots()
1143                            int Idx, unsigned PhysReg, int StackSlot,
1601                     int Idx, unsigned PhysReg, int StackSlot,  in SpillRegToStackSlot()  argument
1610   TII->storeRegToStackSlot(*MBB, llvm::next(MII), PhysReg, true, StackSlot, RC,  in SpillRegToStackSlot()
1613   VRM->addSpillSlotUse(StackSlot, StoreMI);  in SpillRegToStackSlot()
1652   Spills.ModifyStackSlotOrReMat(StackSlot);  in SpillRegToStackSlot()
1654   Spills.addAvailable(StackSlot, PhysReg, isAvailable);  in SpillRegToStackSlot()
1904     int StackSlot = VRM->getStackSlot(VirtReg);  in InsertSpills()  local
1906     TII->storeRegToStackSlot(*MBB, llvm::next(MII), Phys, isKill, StackSlot,  in InsertSpills()
1909     VRM->addSpillSlotUse(StackSlot, StoreMI);  in InsertSpills()
2467         int StackSlot;  in RewriteMBB()  local
2469           if (unsigned SrcReg = TII->isStoreToStackSlot(&MI, StackSlot)) {  in RewriteMBB()
2473             if (CommuteToFoldReload(MII, VirtReg, SrcReg, StackSlot,  in RewriteMBB()
2483             MaybeDeadStores[StackSlot] = &MI;  in RewriteMBB()
2488             Spills.addAvailable(StackSlot, SrcReg, MI.killsRegister(SrcReg));  in RewriteMBB()
2552       int StackSlot = VRM->getStackSlot(VirtReg);  in RewriteMBB()  local
2579       Spills.ClobberSharingStackSlots(StackSlot);  in RewriteMBB()
2589         MachineInstr *&LastStore = MaybeDeadStores[StackSlot];  in RewriteMBB()
2590         SpillRegToStackSlot(MII, -1, PhysReg, StackSlot, RC, true,  in RewriteMBB()