464   ArrayRef<CodeGenRegisterClass*> RegClasses = RegBank.getRegClasses();  in computeSubClasses()  local
467   for (unsigned rci = RegClasses.size(); rci; --rci) {  in computeSubClasses()
468     CodeGenRegisterClass &RC = *RegClasses[rci - 1];  in computeSubClasses()
469     RC.SubClasses.resize(RegClasses.size());  in computeSubClasses()
473     for (unsigned s = rci; s != RegClasses.size(); ++s) {  in computeSubClasses()
476       CodeGenRegisterClass *SubRC = RegClasses[s];  in computeSubClasses()
485     for (unsigned s = rci - 1; s && testSubClass(&RC, RegClasses[s - 1]); --s)  in computeSubClasses()
490   for (unsigned rci = 0; rci != RegClasses.size(); ++rci) {  in computeSubClasses()
491     const BitVector &SC = RegClasses[rci]->getSubClasses();  in computeSubClasses()
495       RegClasses[s]->SuperClasses.push_back(RegClasses[rci]);  in computeSubClasses()
502   for (unsigned rci = 0; rci != RegClasses.size(); ++rci)  in computeSubClasses()
503     if (!RegClasses[rci]->getDef())  in computeSubClasses()
504       RegClasses[rci]->inheritProperties(RegBank);  in computeSubClasses()
550   RegClasses.reserve(RCs.size());  in CodeGenRegBank()
558   array_pod_sort(RegClasses.begin(), RegClasses.end(), TopoOrderRC);  in CodeGenRegBank()
559   for (unsigned i = 0, e = RegClasses.size(); i != e; ++i)  in CodeGenRegBank()
560     RegClasses[i]->EnumValue = i;  in CodeGenRegBank()
574   RegClasses.push_back(RC);  in addToMaps()
755   for (unsigned rci = 0; rci != RegClasses.size(); ++rci) {  in computeInferredRegisterClasses()
756     CodeGenRegisterClass &RC = *RegClasses[rci];  in computeInferredRegisterClasses()