113       errs() << "Warning: DWARF numbers for register " << getQualifiedName(Reg)  in EmitRegMapping()
150            << getQualifiedName(I->first) << ", ";  in EmitRegMapping()
194         OS << "mapLLVMRegToDwarfReg(" << getQualifiedName(I->first) << ", "  in EmitRegMapping()
270        << getQualifiedName(Reg->TheDef) << ", ";  in runMCDesc()
274         OS << getQualifiedName((*I)->TheDef) << ", ";  in runMCDesc()
291       OS << getQualifiedName(SR[j]->TheDef) << ", ";  in runMCDesc()
306       OS << getQualifiedName(SR[j]->TheDef) << ", ";  in runMCDesc()
352       OS << getQualifiedName(Reg) << ", ";  in runMCDesc()
374     OS << "  MCRegisterClass(" << RC.getQualifiedName() + "RegClassID" << ", "  in runMCDesc()
580             OS << "&" << RC2.getQualifiedName() << "RegClass";  in runTargetDesc()
614         OS << "    &" << Supers[i]->getQualifiedName() << "RegClass,\n";  in runTargetDesc()
644             OS << (elem ? ", " : " ") << getQualifiedName(Elems[elem]);  in runTargetDesc()
648            << "MCRegisterClasses[" << RC.getQualifiedName() + "RegClassID];"  in runTargetDesc()
665     OS << "    &" << RegisterClasses[i]->getQualifiedName()  in runTargetDesc()
726     OS << "  case " << getQualifiedName(Regs[i]->TheDef) << ":\n";  in runTargetDesc()
731       OS << "    case " << getQualifiedName(ii->first)  in runTargetDesc()
732          << ": return " << getQualifiedName(ii->second->TheDef) << ";\n";  in runTargetDesc()
747     OS << "  case " << getQualifiedName(Regs[i]->TheDef) << ":\n";  in runTargetDesc()
750       OS << "    if (SubRegNo == " << getQualifiedName(ii->second->TheDef)  in runTargetDesc()
751          << ")  return " << getQualifiedName(ii->first) << ";\n";  in runTargetDesc()
769           OS << "  case " << getQualifiedName(SubRegIndices[i])  in runTargetDesc()
773         OS << "    case " << getQualifiedName(SubRegIndices[j])  in runTargetDesc()
774            << ": return " << getQualifiedName(Comp) << ";\n";  in runTargetDesc()