Lines Matching refs:ext

1 define <4 x float> @_Z6selectDv4_iDv4_fS0_(<4 x i32> %cond.ext, <4 x float> %arg1, <4 x float> %arg…
3   %cond = trunc <4 x i32> %cond.ext to <4 x i1>
8 define <4 x i32> @_Z6selectDv4_iS_S_(<4 x i32> %cond.ext, <4 x i32> %arg1, <4 x i32> %arg2) {
10   %cond = trunc <4 x i32> %cond.ext to <4 x i1>
15 define <4 x i32> @_Z6selectDv4_iDv4_jS0_(<4 x i32> %cond.ext, <4 x i32> %arg1, <4 x i32> %arg2) {
17   %cond = trunc <4 x i32> %cond.ext to <4 x i1>
22 define <8 x i16> @_Z6selectDv8_sS_S_(<8 x i16> %cond.ext, <8 x i16> %arg1, <8 x i16> %arg2) {
24   %cond = trunc <8 x i16> %cond.ext to <8 x i1>
29 define <8 x i16> @_Z6selectDv8_sDv8_tS0_(<8 x i16> %cond.ext, <8 x i16> %arg1, <8 x i16> %arg2) {
31   %cond = trunc <8 x i16> %cond.ext to <8 x i1>
36 define <16 x i8> @_Z6selectDv16_aS_S_(<16 x i8> %cond.ext, <16 x i8> %arg1, <16 x i8> %arg2) {
38   %cond = trunc <16 x i8> %cond.ext to <16 x i1>
43 define <16 x i8> @_Z6selectDv16_aDv16_hS0_(<16 x i8> %cond.ext, <16 x i8> %arg1, <16 x i8> %arg2) {
45   %cond = trunc <16 x i8> %cond.ext to <16 x i1>
50 …fine <4 x i32> @_Z9select_i1Dv4_iS_S_(<4 x i32> %cond.ext, <4 x i32> %arg1.ext, <4 x i32> %arg2.ex…
52   %cond = trunc <4 x i32> %cond.ext to <4 x i1>
53   %arg1 = trunc <4 x i32> %arg1.ext to <4 x i1>
54   %arg2 = trunc <4 x i32> %arg2.ext to <4 x i1>
60 …fine <8 x i16> @_Z9select_i1Dv8_sS_S_(<8 x i16> %cond.ext, <8 x i16> %arg1.ext, <8 x i16> %arg2.ex…
62   %cond = trunc <8 x i16> %cond.ext to <8 x i1>
63   %arg1 = trunc <8 x i16> %arg1.ext to <8 x i1>
64   %arg2 = trunc <8 x i16> %arg2.ext to <8 x i1>
70 …ine <16 x i8> @_Z9select_i1Dv16_aS_S_(<16 x i8> %cond.ext, <16 x i8> %arg1.ext, <16 x i8> %arg2.ex…
72   %cond = trunc <16 x i8> %cond.ext to <16 x i1>
73   %arg1 = trunc <16 x i8> %arg1.ext to <16 x i1>
74   %arg2 = trunc <16 x i8> %arg2.ext to <16 x i1>