945                                IValueT Rt, const Operand *OpAddress,  in emitMemOp()  argument
948   switch (encodeAddress(OpAddress, Address, TInfo, Imm12Address)) {  in emitMemOp()
1002                                    IValueT Rt, const Operand *OpAddress,  in emitMemOpEnc3()  argument
1006   switch (encodeAddress(OpAddress, Address, TInfo, RotatedImm8Enc3Address)) {  in emitMemOpEnc3()
1546 void AssemblerARM32::ldr(const Operand *OpRt, const Operand *OpAddress,  in ldr()  argument
1580     emitMemOp(Cond, IsLoad, IsByte, Rt, OpAddress, TInfo, LdrName);  in ldr()
1593     emitMemOpEnc3(Cond, L | B7 | B5 | B4, Rt, OpAddress, TInfo, Ldrh);  in ldr()
1612     emitMemOp(Cond, IsLoad, IsByte, Rt, OpAddress, TInfo, LdrName);  in ldr()
1620                                  const Operand *OpAddress,  in emitMemExOp()  argument
1642   if (encodeAddress(OpAddress, AddressRn, TInfo, NoImmOffsetAddress) !=  in emitMemExOp()
1657 void AssemblerARM32::ldrex(const Operand *OpRt, const Operand *OpAddress,  in ldrex()  argument
1682   emitMemExOp(Cond, Ty, IsLoad, OpRt, Rm, OpAddress, TInfo, LdrexName);  in ldrex()
1891 void AssemblerARM32::str(const Operand *OpRt, const Operand *OpAddress,  in str()  argument
1917     emitMemOp(Cond, IsLoad, IsByte, Rt, OpAddress, TInfo, StrName);  in str()
1930     emitMemOpEnc3(Cond, B7 | B5 | B4, Rt, OpAddress, TInfo, Strh);  in str()
1945     emitMemOp(Cond, IsLoad, IsByte, Rt, OpAddress, TInfo, StrName);  in str()
1952                            const Operand *OpAddress, CondARM32::Cond Cond,  in strex()  argument
1982   emitMemExOp(Cond, Ty, !IsLoad, OpRd, Rt, OpAddress, TInfo, StrexName);  in strex()
2838 void AssemblerARM32::vldrd(const Operand *OpDd, const Operand *OpAddress,  in vldrd()  argument
2850       encodeAddress(OpAddress, Address, TInfo, RotatedImm8Div4Address);  in vldrd()
2860 void AssemblerARM32::vldrq(const Operand *OpQd, const Operand *OpAddress,  in vldrq()  argument
2875       encodeAddress(OpAddress, Address, TInfo, RotatedImm8Div4Address);  in vldrq()
2885 void AssemblerARM32::vldrs(const Operand *OpSd, const Operand *OpAddress,  in vldrs()  argument
2897       encodeAddress(OpAddress, Address, TInfo, RotatedImm8Div4Address);  in vldrs()
2973                             const Operand *OpAddress, const TargetInfo &TInfo) {  in vld1qr()  argument
2984   if (encodeAddress(OpAddress, Address, TInfo, NoImmOffsetAddress) !=  in vld1qr()
2995                           const Operand *OpAddress, const TargetInfo &TInfo) {  in vld1()  argument
3000     return vldrq(OpQd, OpAddress, Ice::CondARM32::AL, TInfo);  in vld1()
3014   if (encodeAddress(OpAddress, Address, TInfo, NoImmOffsetAddress) !=  in vld1()
3682 void AssemblerARM32::vstrd(const Operand *OpDd, const Operand *OpAddress,  in vstrd()  argument
3694       encodeAddress(OpAddress, Address, TInfo, RotatedImm8Div4Address);  in vstrd()
3704 void AssemblerARM32::vstrq(const Operand *OpQd, const Operand *OpAddress,  in vstrq()  argument
3719       encodeAddress(OpAddress, Address, TInfo, RotatedImm8Div4Address);  in vstrq()
3729 void AssemblerARM32::vstrs(const Operand *OpSd, const Operand *OpAddress,  in vstrs()  argument
3741       encodeAddress(OpAddress, Address, TInfo, RotatedImm8Div4Address);  in vstrs()
3751                             const Operand *OpAddress, const TargetInfo &TInfo) {  in vst1qr()  argument
3762   if (encodeAddress(OpAddress, Address, TInfo, NoImmOffsetAddress) !=  in vst1qr()
3773                           const Operand *OpAddress, const TargetInfo &TInfo) {  in vst1()  argument
3779     return vstrq(OpQd, OpAddress, Ice::CondARM32::AL, TInfo);  in vst1()
3793   if (encodeAddress(OpAddress, Address, TInfo, NoImmOffsetAddress) !=  in vst1()