1223   const IValueT Qd = encodeQRegister(OpQd, "Qd", OpcodeName);  in emitSIMDqqqBase()  local
1227   emitSIMDBase(Opcode, mapQRegToDReg(Qd), mapQRegToDReg(Qn), mapQRegToDReg(Qm),  in emitSIMDqqqBase()
1244   const IValueT Qd = encodeQRegister(OpQd, "Qd", OpcodeName);  in emitSIMDShiftqqc()  local
1250   emitSIMDBase(Opcode | (Imm6 << ElmtShift), mapQRegToDReg(Qd),  in emitSIMDShiftqqc()
1261   const IValueT Qd = encodeQRegister(OpQd, "Qd", OpcodeName);  in emitSIMDCvtqq()  local
1264   emitSIMDBase(SIMDOpcode, mapQRegToDReg(Qd), mapQRegToDReg(Qn),  in emitSIMDCvtqq()
2981   const IValueT Qd = encodeQRegister(OpQd, "Qd", Vld1qr);  in vld1qr()  local
2982   const IValueT Dd = mapQRegToDReg(Qd);  in vld1qr()
3011   const IValueT Qd = encodeQRegister(OpQd, "Qd", Vld1qr);  in vld1()  local
3012   const IValueT Dd = mapQRegToDReg(Qd);  in vld1()
3357   const IValueT Qd = encodeQRegister(OpQd, "Qd", Vmull);  in vmulh()  local
3361   const IValueT Dd = mapQRegToDReg(Qd);  in vmulh()
3533   const IValueT Qd = encodeQRegister(OpQd, "Qd", Vmvn);  in vmvnq()  local
3538   emitSIMDBase(VmvnOpcode, mapQRegToDReg(Qd), mapQRegToDReg(Qn),  in vmvnq()
3658   const IValueT Qd = encodeQRegister(OpQd, "Qd", Vneg);  in vnegqs()  local
3665   emitSIMDBase(VnegOpcode | (ElmtSize << ElmtShift), mapQRegToDReg(Qd),  in vnegqs()
3759   const IValueT Qd = encodeQRegister(OpQd, "Qd", Vst1qr);  in vst1qr()  local
3760   const IValueT Dd = mapQRegToDReg(Qd);  in vst1qr()
3790   const IValueT Qd = encodeQRegister(OpQd, "Qd", Vst1qr);  in vst1()  local
3791   const IValueT Dd = mapQRegToDReg(Qd);  in vst1()
3915   const IValueT Qd = encodeQRegister(OpQd, "Qd", Vqmovn);  in vqmovn2()  local
3918   const IValueT Dd = mapQRegToDReg(Qd);  in vqmovn2()
3928   if (Qm != Qd) {  in vqmovn2()
3933   } else if (Qn != Qd) {  in vqmovn2()