Lines Matching refs:TargetARM32

40   return ::Ice::ARM32::TargetARM32::create(Func);  in createTargetLowering()
54 ::Ice::ARM32::TargetARM32::staticInit(Ctx); in staticInit()
66 return ::Ice::ARM32::TargetARM32::shouldBePooled(C); in shouldBePooled()
70 return ::Ice::ARM32::TargetARM32::getPointerType(); in getPointerType()
307 TargetARM32::TargetARM32(Cfg *Func) in TargetARM32() function in Ice::ARM32::TargetARM32
311 void TargetARM32::staticInit(GlobalContext *Ctx) { in staticInit()
423 uint32_t TargetARM32::getCallStackArgumentsSizeBytes(const InstCall *Call) { in getCallStackArgumentsSizeBytes()
424 TargetARM32::CallingConv CC; in getCallStackArgumentsSizeBytes()
447 void TargetARM32::genTargetHelperCallFor(Inst *Instr) { in genTargetHelperCallFor()
499 ARM32HelpersPreamble[TargetHelper] = &TargetARM32::preambleDivRem; in genTargetHelperCallFor()
570 ARM32HelpersPreamble[TargetHelper] = &TargetARM32::preambleDivRem; in genTargetHelperCallFor()
743 ARM32HelpersPostamble[TargetHelper] = &TargetARM32::postambleCtpop64; in genTargetHelperCallFor()
841 void TargetARM32::findMaxStackOutArgsSize() { in findMaxStackOutArgsSize()
859 void TargetARM32::createGotPtr() { in createGotPtr()
866 void TargetARM32::insertGotPtrInitPlaceholder() { in insertGotPtrInitPlaceholder()
888 TargetARM32::createGotoffRelocation(const ConstantRelocatable *CR) { in createGotoffRelocation()
914 void TargetARM32::materializeGotAddr(CfgNode *Node) { in materializeGotAddr()
950 void TargetARM32::loadNamedConstantRelocatablePIC( in loadNamedConstantRelocatablePIC()
995 void TargetARM32::translateO2() { in translateO2()
1114 void TargetARM32::translateOm1() { in translateOm1()
1176 uint32_t TargetARM32::getStackAlignment() const { in getStackAlignment()
1180 bool TargetARM32::doBranchOpt(Inst *I, const CfgNode *NextNode) { in doBranchOpt()
1187 const char *TargetARM32::getRegName(RegNumT RegNum, Type Ty) const { in getRegName()
1192 Variable *TargetARM32::getPhysicalRegister(RegNumT RegNum, Type Ty) { in getPhysicalRegister()
1225 void TargetARM32::emitJumpTable(const Cfg *Func, in emitJumpTable()
1232 void TargetARM32::emitVariable(const Variable *Var) const { in emitVariable()
1259 TargetARM32::CallingConv::CallingConv() in CallingConv()
1268 bool TargetARM32::CallingConv::argInGPR(Type Ty, RegNumT *Reg) { in argInGPR()
1302 void TargetARM32::CallingConv::discardUnavailableGPRsAndTheirAliases( in discardUnavailableGPRsAndTheirAliases()
1310 bool TargetARM32::CallingConv::argInVFP(Type Ty, RegNumT *Reg) { in argInVFP()
1340 void TargetARM32::CallingConv::discardUnavailableVFPRegs( in discardUnavailableVFPRegs()
1347 void TargetARM32::lowerArguments() { in lowerArguments()
1349 TargetARM32::CallingConv CC; in lowerArguments()
1401 void TargetARM32::finishArgumentLowering(Variable *Arg, Variable *FramePtr, in finishArgumentLowering()
1432 Type TargetARM32::stackSlotType() { return IceType_i32; } in stackSlotType()
1434 void TargetARM32::addProlog(CfgNode *Node) { in addProlog()
1646 TargetARM32::CallingConv CC; in addProlog()
1698 void TargetARM32::addEpilog(CfgNode *Node) { in addEpilog()
1761 bool TargetARM32::isLegalMemOffset(Type Ty, int32_t Offset) const { in isLegalMemOffset()
1766 Variable *TargetARM32::PostLoweringLegalizer::newBaseRegister( in newBaseRegister()
1805 OperandARM32Mem *TargetARM32::PostLoweringLegalizer::createMemOperand( in createMemOperand()
1834 void TargetARM32::PostLoweringLegalizer::resetTempBaseIfClobberedBy( in resetTempBaseIfClobberedBy()
1860 void TargetARM32::PostLoweringLegalizer::legalizeMov(InstARM32Mov *MovInstr) { in legalizeMov()
1881 TargetARM32::Sandboxer(Target) in legalizeMov()
1906 TargetARM32::Sandboxer(Target) in legalizeMov()
1954 TargetARM32::PostLoweringLegalizer::legalizeMemOperand(OperandARM32Mem *Mem, in legalizeMemOperand()
2019 void TargetARM32::postLowerLegalization() { in postLowerLegalization()
2096 Operand *TargetARM32::loOperand(Operand *Operand) { in loOperand()
2123 Operand *TargetARM32::hiOperand(Operand *Operand) { in hiOperand()
2183 SmallBitVector TargetARM32::getRegisterSet(RegSetMask Include, in getRegisterSet()
2210 void TargetARM32::lowerAlloca(const InstAlloca *Instr) { in lowerAlloca()
2289 void TargetARM32::div0Check(Type Ty, Operand *SrcLo, Operand *SrcHi) { in div0Check()
2322 void TargetARM32::lowerIDivRem(Variable *Dest, Variable *T, Variable *Src0R, in lowerIDivRem()
2348 TargetARM32::SafeBoolChain
2349 TargetARM32::lowerInt1Arithmetic(const InstArithmetic *Instr) { in lowerInt1Arithmetic()
2429 Variable *src0R(TargetARM32 *Target) const { in src0R()
2433 Variable *unswappedSrc0R(TargetARM32 *Target) const { in unswappedSrc0R()
2437 Operand *src1RF(TargetARM32 *Target) const { in src1RF()
2441 Variable *unswappedSrc1R(TargetARM32 *Target) const { in unswappedSrc1R()
2452 static Variable *legalizeToReg(TargetARM32 *Target, Operand *Src) { in legalizeToReg()
2456 static Operand *legalizeToRegOrFlex(TargetARM32 *Target, Operand *Src) { in legalizeToRegOrFlex()
2458 TargetARM32::Legal_Reg | TargetARM32::Legal_Flex); in legalizeToRegOrFlex()
2511 Operand *unswappedSrc1RShAmtImm(TargetARM32 *Target) const { in unswappedSrc1RShAmtImm()
2536 Operand *negatedSrc1F(TargetARM32 *Target) const { in negatedSrc1F()
2548 Operand *invertedSrc1F(TargetARM32 *Target) const { in invertedSrc1F()
2556 void TargetARM32::preambleDivRem(const InstCall *Instr) { in preambleDivRem()
2587 void TargetARM32::lowerInt64Arithmetic(InstArithmetic::OpKind Op, in lowerInt64Arithmetic()
3075 void TargetARM32::lowerArithmetic(const InstArithmetic *Instr) { in lowerArithmetic()
3131 lowerIDivRem(Dest, T, Src0R, Src1, &TargetARM32::_uxt, &TargetARM32::_udiv, in lowerArithmetic()
3138 lowerIDivRem(Dest, T, Src0R, Src1, &TargetARM32::_sxt, &TargetARM32::_sdiv, in lowerArithmetic()
3145 lowerIDivRem(Dest, T, Src0R, Src1, &TargetARM32::_uxt, &TargetARM32::_udiv, in lowerArithmetic()
3152 lowerIDivRem(Dest, T, Src0R, Src1, &TargetARM32::_sxt, &TargetARM32::_sdiv, in lowerArithmetic()
3521 void TargetARM32::lowerAssign(const InstAssign *Instr) { in lowerAssign()
3568 TargetARM32::ShortCircuitCondAndLabel TargetARM32::lowerInt1ForBranch( in lowerInt1ForBranch()
3661 void TargetARM32::lowerBr(const InstBr *Instr) { in lowerBr()
3693 void TargetARM32::lowerCall(const InstCall *Instr) { in lowerCall()
3705 TargetARM32::CallingConv CC; in lowerCall()
3894 void TargetARM32::lowerCast(const InstCast *Instr) { in lowerCast()
4236 void TargetARM32::lowerExtractElement(const InstExtractElement *Instr) { in lowerExtractElement()
4311 TargetARM32::CondWhenTrue TargetARM32::lowerFcmpCond(const InstFcmp *Instr) { in lowerFcmpCond()
4334 void TargetARM32::lowerFcmp(const InstFcmp *Instr) { in lowerFcmp()
4444 TargetARM32::CondWhenTrue
4445 TargetARM32::lowerInt64IcmpCond(InstIcmp::ICond Condition, Operand *Src0, in lowerInt64IcmpCond()
4569 TargetARM32::CondWhenTrue
4570 TargetARM32::lowerInt32IcmpCond(InstIcmp::ICond Condition, Operand *Src0, in lowerInt32IcmpCond()
4606 TargetARM32::CondWhenTrue
4607 TargetARM32::lowerInt8AndInt16IcmpCond(InstIcmp::ICond Condition, Operand *Src0, in lowerInt8AndInt16IcmpCond()
4651 TargetARM32::CondWhenTrue TargetARM32::lowerIcmpCond(const InstIcmp *Instr) { in lowerIcmpCond()
4656 TargetARM32::CondWhenTrue TargetARM32::lowerIcmpCond(InstIcmp::ICond Condition, in lowerIcmpCond()
4705 void TargetARM32::lowerIcmp(const InstIcmp *Instr) { in lowerIcmp()
4797 void TargetARM32::lowerInsertElement(const InstInsertElement *Instr) { in lowerInsertElement()
4830 void TargetARM32::lowerLoadLinkedStoreExclusive( in lowerLoadLinkedStoreExclusive()
4892 void TargetARM32::lowerAtomicRMW(Variable *Dest, uint32_t Operation, in lowerAtomicRMW()
4941 void TargetARM32::lowerInt64AtomicRMW(Variable *Dest, uint32_t Operation, in lowerInt64AtomicRMW()
4993 void TargetARM32::postambleCtpop64(const InstCall *Instr) { in postambleCtpop64()
5010 void TargetARM32::lowerIntrinsicCall(const InstIntrinsicCall *Instr) { in lowerIntrinsicCall()
5445 void TargetARM32::lowerCLZ(Variable *Dest, Variable *ValLoR, Variable *ValHiR) { in lowerCLZ()
5475 void TargetARM32::lowerLoad(const InstLoad *Load) { in lowerLoad()
5762 OperandARM32Mem *TargetARM32::formAddressingMode(Type Ty, Cfg *Func, in formAddressingMode()
5909 void TargetARM32::doAddressOptLoad() { in doAddressOptLoad()
5921 void TargetARM32::randomlyInsertNop(float Probability, in randomlyInsertNop()
5929 void TargetARM32::lowerPhi(const InstPhi * /*Instr*/) { in lowerPhi()
5933 void TargetARM32::lowerRet(const InstRet *Instr) { in lowerRet()
5973 void TargetARM32::lowerShuffleVector(const InstShuffleVector *Instr) { in lowerShuffleVector()
6120 void TargetARM32::lowerSelect(const InstSelect *Instr) { in lowerSelect()
6162 void TargetARM32::lowerStore(const InstStore *Instr) { in lowerStore()
6180 void TargetARM32::doAddressOptStore() { in doAddressOptStore()
6192 void TargetARM32::lowerSwitch(const InstSwitch *Instr) { in lowerSwitch()
6236 void TargetARM32::lowerBreakpoint(const InstBreakpoint *Instr) { in lowerBreakpoint()
6240 void TargetARM32::lowerUnreachable(const InstUnreachable * /*Instr*/) { in lowerUnreachable()
6295 void TargetARM32::prelowerPhis() { in prelowerPhis()
6312 Variable *TargetARM32::makeVectorOfZeros(Type Ty, RegNumT RegNum) { in makeVectorOfZeros()
6322 Variable *TargetARM32::copyToReg(Operand *Src, RegNumT RegNum) { in copyToReg()
6334 Operand *TargetARM32::legalize(Operand *From, LegalMask Allowed, in legalize()
6554 Variable *TargetARM32::legalizeToReg(Operand *From, RegNumT RegNum) { in legalizeToReg()
6559 Operand *TargetARM32::legalizeUndef(Operand *From, RegNumT RegNum) { in legalizeUndef()
6579 OperandARM32Mem *TargetARM32::formMemoryOperand(Operand *Operand, Type Ty) { in formMemoryOperand()
6597 Variable64On32 *TargetARM32::makeI64RegPair() { in makeI64RegPair()
6607 Variable *TargetARM32::makeReg(Type Type, RegNumT RegNum) { in makeReg()
6619 void TargetARM32::alignRegisterPow2(Variable *Reg, uint32_t Align, in alignRegisterPow2()
6639 void TargetARM32::postLower() { in postLower()
6646 void TargetARM32::makeRandomRegisterPermutation( in makeRandomRegisterPermutation()
6655 void TargetARM32::emit(const ConstantInteger32 *C) const { in emit()
6662 void TargetARM32::emit(const ConstantInteger64 *) const { in emit()
6666 void TargetARM32::emit(const ConstantFloat *C) const { in emit()
6671 void TargetARM32::emit(const ConstantDouble *C) const { in emit()
6676 void TargetARM32::emit(const ConstantUndef *) const { in emit()
6680 void TargetARM32::emit(const ConstantRelocatable *C) const { in emit()
6688 void TargetARM32::lowerInt1ForSelect(Variable *Dest, Operand *Boolean, in lowerInt1ForSelect()
6813 TargetARM32::SafeBoolChain TargetARM32::lowerInt1(Variable *Dest, in lowerInt1()
7002 void TargetARM32::ComputationTracker::recordProducers(CfgNode *Node) { in recordProducers()
7084 TargetARM32::Sandboxer::Sandboxer(TargetARM32 *Target, in Sandboxer()
7088 TargetARM32::Sandboxer::~Sandboxer() {} in ~Sandboxer()
7109 void TargetARM32::Sandboxer::createAutoBundle() { in createAutoBundle()
7113 void TargetARM32::Sandboxer::add_sp(Operand *AddAmount) { in add_sp()
7124 void TargetARM32::Sandboxer::align_sp(size_t Alignment) { in align_sp()
7135 InstARM32Call *TargetARM32::Sandboxer::bl(Variable *ReturnReg, in bl()
7147 void TargetARM32::Sandboxer::ldr(Variable *Dest, OperandARM32Mem *Mem, in ldr()
7158 void TargetARM32::Sandboxer::ldrex(Variable *Dest, OperandARM32Mem *Mem, in ldrex()
7169 void TargetARM32::Sandboxer::reset_sp(Variable *Src) { in reset_sp()
7180 void TargetARM32::Sandboxer::ret(Variable *RetAddr, Variable *RetValue) { in ret()
7188 void TargetARM32::Sandboxer::str(Variable *Src, OperandARM32Mem *Mem, in str()
7199 void TargetARM32::Sandboxer::strex(Variable *Dest, Variable *Src, in strex()
7210 void TargetARM32::Sandboxer::sub_sp(Operand *SubAmount) { in sub_sp()
7416 SmallBitVector TargetARM32::TypeToRegisterSet[RegARM32::RCARM32_NUM];
7417 SmallBitVector TargetARM32::TypeToRegisterSetUnfiltered[RegARM32::RCARM32_NUM];
7418 SmallBitVector TargetARM32::RegisterAliases[RegARM32::Reg_NUM];