Lines Matching refs:TargetX86Base

386 void TargetX86Base<TraitsType>::initNodeForLowering(CfgNode *Node) {
392 TargetX86Base<TraitsType>::TargetX86Base(Cfg *Func)
409 void TargetX86Base<TraitsType>::staticInit(GlobalContext *Ctx) {
422 bool TargetX86Base<TraitsType>::shouldBePooled(const Constant *C) {
436 ::Ice::Type TargetX86Base<TraitsType>::getPointerType() {
444 template <typename TraitsType> void TargetX86Base<TraitsType>::translateO2() {
594 template <typename TraitsType> void TargetX86Base<TraitsType>::translateOm1() {
683           llvm::dyn_cast<typename TargetX86Base<TraitsType>::X86OperandMem>(
686             llvm::dyn_cast<typename TargetX86Base<TraitsType>::X86OperandMem>(
698 template <typename TraitsType> void TargetX86Base<TraitsType>::findRMW() {
816 template <typename TraitsType> void TargetX86Base<TraitsType>::doLoadOpt() {
907 bool TargetX86Base<TraitsType>::doBranchOpt(Inst *I, const CfgNode *NextNode) {
915 Variable *TargetX86Base<TraitsType>::getPhysicalRegister(RegNumT RegNum,
939 const char *TargetX86Base<TraitsType>::getRegName(RegNumT RegNum,
945 void TargetX86Base<TraitsType>::emitVariable(const Variable *Var) const {
978 typename TargetX86Base<TraitsType>::X86Address
979 TargetX86Base<TraitsType>::stackVarToAsmOperand(const Variable *Var) const {
996 void TargetX86Base<TraitsType>::addProlog(CfgNode *Node) {
1281 void TargetX86Base<TraitsType>::finishArgumentLowering(
1319 void TargetX86Base<TraitsType>::addEpilog(CfgNode *Node) {
1376 template <typename TraitsType> Type TargetX86Base<TraitsType>::stackSlotType() {
1383 TargetX86Base<TraitsType>::loOperand(Operand *Operand) {
1412 TargetX86Base<TraitsType>::hiOperand(Operand *Operand) {
1450 TargetX86Base<TraitsType>::getRegisterSet(RegSetMask Include,
1456 void TargetX86Base<TraitsType>::lowerAlloca(const InstAlloca *Instr) {
1536 void TargetX86Base<TraitsType>::lowerArguments() {
1615 bool TargetX86Base<TraitsType>::optimizeScalarMul(Variable *Dest, Operand *Src0,
1711 void TargetX86Base<TraitsType>::lowerShift64(InstArithmetic::OpKind Op,
1924 void TargetX86Base<TraitsType>::lowerArithmetic(const InstArithmetic *Instr) {
2552 void TargetX86Base<TraitsType>::lowerAssign(const InstAssign *Instr) {
2564 void TargetX86Base<TraitsType>::lowerBr(const InstBr *Br) {
2605 void TargetX86Base<TraitsType>::lowerCall(const InstCall *Instr) {
2811 void TargetX86Base<TraitsType>::lowerCast(const InstCast *Instr) {
3241 void TargetX86Base<TraitsType>::lowerExtractElement(
3322 void TargetX86Base<TraitsType>::lowerFcmp(const InstFcmp *Fcmp) {
3334 void TargetX86Base<TraitsType>::lowerFcmpAndConsumer(const InstFcmp *Fcmp,
3440 void TargetX86Base<TraitsType>::lowerFcmpVector(const InstFcmp *Fcmp) {
3512 void TargetX86Base<TraitsType>::lowerIcmpAndConsumer(const InstIcmp *Icmp,
3550 void TargetX86Base<TraitsType>::lowerIcmpVector(const InstIcmp *Icmp) {
3668 TargetX86Base<TraitsType>::lowerIcmp64(const InstIcmp *Icmp,
3813 void TargetX86Base<TraitsType>::setccOrConsumer(BrCond Condition,
3835 void TargetX86Base<TraitsType>::movOrConsumer(bool IcmpResult, Variable *Dest,
3865 void TargetX86Base<TraitsType>::lowerArithAndConsumer(
3904 void TargetX86Base<TraitsType>::lowerInsertElement(
4039 void TargetX86Base<TraitsType>::lowerIntrinsicCall(
4642 void TargetX86Base<TraitsType>::lowerAtomicCmpxchg(Variable *DestPrev,
4694 bool TargetX86Base<TraitsType>::tryOptimizedCmpxchgCmpBr(Variable *Dest,
4770 void TargetX86Base<TraitsType>::lowerAtomicRMW(Variable *Dest,
4785       Op_Lo = &TargetX86Base<TraitsType>::_add;
4786       Op_Hi = &TargetX86Base<TraitsType>::_adc;
4800       Op_Lo = &TargetX86Base<TraitsType>::_sub;
4801       Op_Hi = &TargetX86Base<TraitsType>::_sbb;
4820     Op_Lo = &TargetX86Base<TraitsType>::_or;
4821     Op_Hi = &TargetX86Base<TraitsType>::_or;
4825     Op_Lo = &TargetX86Base<TraitsType>::_and;
4826     Op_Hi = &TargetX86Base<TraitsType>::_and;
4830     Op_Lo = &TargetX86Base<TraitsType>::_xor;
4831     Op_Hi = &TargetX86Base<TraitsType>::_xor;
4856 void TargetX86Base<TraitsType>::expandAtomicRMWAsCmpxchg(LowerBinOp Op_Lo,
4982 void TargetX86Base<TraitsType>::lowerCountZeros(bool Cttz, Type Ty,
5078 void TargetX86Base<TraitsType>::typedLoad(Type Ty, Variable *Dest,
5096 void TargetX86Base<TraitsType>::typedStore(Type Ty, Variable *Value,
5114 void TargetX86Base<TraitsType>::copyMemory(Type Ty, Variable *Dest,
5125 void TargetX86Base<TraitsType>::lowerMemcpy(Operand *Dest, Operand *Src,
5179 void TargetX86Base<TraitsType>::lowerMemmove(Operand *Dest, Operand *Src,
5251 void TargetX86Base<TraitsType>::lowerMemset(Operand *Dest, Operand *Val,
5728 typename TargetX86Base<TypeTraits>::X86OperandMem *
5729 TargetX86Base<TypeTraits>::computeAddressOpt(const Inst *Instr, Type MemType,
5940 void TargetX86Base<TraitsType>::doMockBoundsCheck(Operand *Opnd) {
5969 void TargetX86Base<TraitsType>::lowerLoad(const InstLoad *Load) {
5983 void TargetX86Base<TraitsType>::doAddressOptOther() {
6016 void TargetX86Base<TraitsType>::doAddressOptLoad() {
6027 void TargetX86Base<TraitsType>::doAddressOptLoadSubVector() {
6044 void TargetX86Base<TraitsType>::randomlyInsertNop(float Probability,
6053 void TargetX86Base<TraitsType>::lowerPhi(const InstPhi * /*Instr*/) {
6058 void TargetX86Base<TraitsType>::lowerRet(const InstRet *Instr) {
6085 Variable *TargetX86Base<TraitsType>::lowerShuffleVector_AllFromSameSrc(
6103 Variable *TargetX86Base<TraitsType>::lowerShuffleVector_TwoFromSameSrc(
6124 Variable *TargetX86Base<TraitsType>::lowerShuffleVector_UnifyFromDifferentSrcs(
6141 GlobalString TargetX86Base<TraitsType>::lowerShuffleVector_NewMaskName() {
6155 TargetX86Base<TraitsType>::lowerShuffleVector_CreatePshufbMask(
6183 void TargetX86Base<TraitsType>::lowerShuffleVector_UsingPshufb(
6242 void TargetX86Base<TraitsType>::lowerShuffleVector(
6625 void TargetX86Base<TraitsType>::lowerSelect(const InstSelect *Select) {
6662 void TargetX86Base<TraitsType>::lowerSelectMove(Variable *Dest, BrCond Cond,
6704 void TargetX86Base<TraitsType>::lowerSelectIntMove(Variable *Dest, BrCond Cond,
6716 void TargetX86Base<TraitsType>::lowerMove(Variable *Dest, Operand *Src,
6752 bool TargetX86Base<TraitsType>::lowerOptimizeFcmpSelect(
6804 void TargetX86Base<TraitsType>::lowerIcmp(const InstIcmp *Icmp) {
6815 void TargetX86Base<TraitsType>::lowerSelectVector(const InstSelect *Instr) {
6884 void TargetX86Base<TraitsType>::lowerStore(const InstStore *Instr) {
6906 void TargetX86Base<TraitsType>::doAddressOptStore() {
6919 void TargetX86Base<TraitsType>::doAddressOptStoreSubVector() {
6938 Operand *TargetX86Base<TraitsType>::lowerCmpRange(Operand *Comparison,
6958 void TargetX86Base<TraitsType>::lowerCaseCluster(const CaseCluster &Case,
7051 void TargetX86Base<TraitsType>::lowerSwitch(const InstSwitch *Instr) {
7195 void TargetX86Base<TraitsType>::eliminateNextVectorSextInstruction(
7210 void TargetX86Base<TraitsType>::lowerUnreachable(
7219 void TargetX86Base<TraitsType>::lowerBreakpoint(
7225 void TargetX86Base<TraitsType>::lowerRMW(const InstX86FakeRMW *RMW) {
7302 void TargetX86Base<TraitsType>::lowerOther(const Inst *Instr) {
7314 template <typename TraitsType> void TargetX86Base<TraitsType>::prelowerPhis() {
7346   PhiLowering::prelowerPhis32Bit<TargetX86Base<TraitsType>>(
7351 void TargetX86Base<TraitsType>::genTargetHelperCallFor(Inst *Instr) {
7596 uint32_t TargetX86Base<TraitsType>::getCallStackArgumentsSizeBytes(
7634 uint32_t TargetX86Base<TraitsType>::getCallStackArgumentsSizeBytes(
7653 Variable *TargetX86Base<TraitsType>::makeZeroedRegister(Type Ty,
7688 Variable *TargetX86Base<TraitsType>::makeVectorOfZeros(Type Ty,
7694 Variable *TargetX86Base<TraitsType>::makeVectorOfMinusOnes(Type Ty,
7711 Variable *TargetX86Base<TraitsType>::makeVectorOfOnes(Type Ty, RegNumT RegNum) {
7719 Variable *TargetX86Base<TraitsType>::makeVectorOfHighOrderBits(Type Ty,
7747 Variable *TargetX86Base<TraitsType>::makeVectorOfFabsMask(Type Ty,
7755 typename TargetX86Base<TraitsType>::X86OperandMem *
7756 TargetX86Base<TraitsType>::getMemoryOperandForStackSlot(Type Ty, Variable *Slot,
7801 Variable *TargetX86Base<TraitsType>::copyToReg8(Operand *Src, RegNumT RegNum) {
7836 Variable *TargetX86Base<TraitsType>::copyToReg(Operand *Src, RegNumT RegNum) {
7848 Operand *TargetX86Base<TraitsType>::legalize(Operand *From, LegalMask Allowed,
8022 Variable *TargetX86Base<TraitsType>::legalizeToReg(Operand *From,
8029 Operand *TargetX86Base<TraitsType>::legalizeUndef(Operand *From,
8057 Operand *TargetX86Base<TraitsType>::legalizeSrc0ForCmp(Operand *Src0,
8070 typename TargetX86Base<TraitsType>::X86OperandMem *
8071 TargetX86Base<TraitsType>::formMemoryOperand(Operand *Opnd, Type Ty,
8109 Variable *TargetX86Base<TraitsType>::makeReg(Type Type, RegNumT RegNum) {
8124 Type TargetX86Base<TraitsType>::largestTypeInSize(uint32_t Size,
8135 Type TargetX86Base<TraitsType>::firstTypeThatFitsSize(uint32_t Size,
8147 template <typename TraitsType> void TargetX86Base<TraitsType>::postLower() {
8155 void TargetX86Base<TraitsType>::makeRandomRegisterPermutation(
8163 void TargetX86Base<TraitsType>::emit(const ConstantInteger32 *C) const {
8171 void TargetX86Base<TraitsType>::emit(const ConstantInteger64 *C) const {
8183 void TargetX86Base<TraitsType>::emit(const ConstantFloat *C) const {
8191 void TargetX86Base<TraitsType>::emit(const ConstantDouble *C) const {
8199 void TargetX86Base<TraitsType>::emit(const ConstantUndef *) const {
8204 void TargetX86Base<Machine>::emit(const ConstantRelocatable *C) const {
8217 TargetX86Base<TraitsType>::randomizeOrPoolImmediate(Constant *Immediate,
8296 typename TargetX86Base<TraitsType>::X86OperandMem *
8297 TargetX86Base<TraitsType>::randomizeOrPoolImmediate(X86OperandMem *MemOperand,
8412 void TargetX86Base<TraitsType>::emitJumpTable(