Lines Matching refs:IMPL
33 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:mem32real REG1=XED_REG_X87STATUS:w:SUPP
43 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:mem32real REG1=XED_REG_X87STATUS:w:SUPP
53 OPERANDS : REG0=XED_REG_ST0:r:IMPL:f80 MEM0:r:mem32real REG1=XED_REG_X87POP:r:SUPP REG2=XED_REG_X8…
63 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:mem32real REG1=XED_REG_X87STATUS:w:SUPP
73 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:mem32real REG1=XED_REG_X87STATUS:w:SUPP
83 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:mem32real REG1=XED_REG_X87STATUS:w:SUPP
93 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:mem32real REG1=XED_REG_X87STATUS:w:SUPP
103 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87STATUS:w:SUPP
113 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87STATUS:w:SUPP
123 OPERANDS : REG0=XED_REG_ST0:r:IMPL:f80 MEM0:r:mem32real REG1=XED_REG_X87STATUS:w:SUPP
126 OPERANDS : REG0=XED_REG_ST0:r:IMPL:f80 MEM0:r:m64real REG1=XED_REG_X87STATUS:w:SUPP
137 OPERANDS : REG0=XED_REG_ST0:r:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87STATUS:w:SUPP
141 OPERANDS : REG0=XED_REG_ST0:r:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87STATUS:w:SUPP
154 OPERANDS : REG0=XED_REG_ST0:r:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87POP:r:SUPP REG3=XED_REG_…
166 OPERANDS : REG0=XED_REG_ST0:r:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87POP:r:SUPP REG3=XED_REG_…
170 OPERANDS : REG0=XED_REG_ST0:r:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87POP:r:SUPP REG3=XED_REG_…
183 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87STATUS:w:SUPP
193 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87STATUS:w:SUPP
203 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87STATUS:w:SUPP
213 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87STATUS:w:SUPP
223 OPERANDS : REG0=XED_REG_ST0:w:IMPL:f80 MEM0:r:mem32real REG1=XED_REG_X87PUSH:r:SUPP REG2=XED_REG_…
233 OPERANDS : MEM0:w:mem32real REG0=XED_REG_ST0:r:IMPL:f80 REG1=XED_REG_X87STATUS:w:SUPP
243 OPERANDS : MEM0:w:mem32real REG0=XED_REG_ST0:r:IMPL:f80 REG1=XED_REG_X87POP:r:SUPP REG2=XED_REG_X…
246 OPERANDS : MEM0:w:mem80real REG0=XED_REG_ST0:r:IMPL:f80 REG1=XED_REG_X87POP:r:SUPP REG2=XED_REG_…
249 OPERANDS : MEM0:w:m64real REG0=XED_REG_ST0:r:IMPL:f80 REG1=XED_REG_X87POP:r:SUPP REG2=XED_REG_X87S…
259 OPERANDS : REG0=X87():w:f80 REG1=XED_REG_ST0:r:IMPL:f80 REG2=XED_REG_X87POP:r:SUPP REG3=XED_REG_X…
263 OPERANDS : REG0=X87():w:f80 REG1=XED_REG_ST0:r:IMPL:f80 REG2=XED_REG_X87POP:r:SUPP REG3=XED_REG_X…
267 OPERANDS : REG0=X87():w:f80 REG1=XED_REG_ST0:r:IMPL:f80 REG2=XED_REG_X87POP:r:SUPP REG3=XED_REG_X…
280 OPERANDS : REG0=X87():w:f80 REG1=XED_REG_ST0:r:IMPL:f80 REG2=XED_REG_X87POP:r:SUPP REG3=XED_REG_X…
337 OPERANDS : REG0=XED_REG_ST0:w:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87PUSH:r:SUPP REG3=XED_REG_…
347 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 REG1=X87():rw:f80 REG2=XED_REG_X87STATUS:w:SUPP
358 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 REG1=X87():rw:f80 REG2=XED_REG_X87STATUS:w:SUPP
362 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 REG1=X87():rw:f80 REG2=XED_REG_X87STATUS:w:SUPP
655 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:mem32int REG1=XED_REG_X87STATUS:w:SUPP
665 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:mem32int REG1=XED_REG_X87STATUS:w:SUPP
675 OPERANDS : REG0=XED_REG_ST0:r:IMPL:f80 MEM0:r:mem32int REG1=XED_REG_X87STATUS:w:SUPP
685 OPERANDS : REG0=XED_REG_ST0:r:IMPL:f80 MEM0:r:mem32int REG1=XED_REG_X87POP:r:SUPP REG2=XED_REG_X87…
695 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:mem32int REG1=XED_REG_X87STATUS:w:SUPP
705 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:mem32int REG1=XED_REG_X87STATUS:w:SUPP
715 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:mem32int REG1=XED_REG_X87STATUS:w:SUPP
725 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:mem32int REG1=XED_REG_X87STATUS:w:SUPP
736 OPERANDS : REG0=XED_REG_ST0:cw:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87STATUS:w:SUPP
747 OPERANDS : REG0=XED_REG_ST0:cw:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87STATUS:w:SUPP
758 OPERANDS : REG0=XED_REG_ST0:cw:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87STATUS:w:SUPP
769 OPERANDS : REG0=XED_REG_ST0:cw:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87STATUS:w:SUPP
789 OPERANDS : REG0=XED_REG_ST0:w:IMPL:f80 MEM0:r:mem32int REG1=XED_REG_X87PUSH:r:SUPP REG2=XED_REG_X…
799 OPERANDS : MEM0:w:mem32int REG0=XED_REG_ST0:r:IMPL:f80 REG1=XED_REG_X87POP:r:SUPP REG2=XED_REG_X8…
809 OPERANDS : MEM0:w:mem32int REG0=XED_REG_ST0:r:IMPL:f80 REG1=XED_REG_X87STATUS:w:SUPP
819 OPERANDS : MEM0:w:mem32int REG0=XED_REG_ST0:r:IMPL:f80 REG1=XED_REG_X87POP:r:SUPP REG2=XED_REG_X87…
829 OPERANDS : REG0=XED_REG_ST0:w:IMPL:f80 MEM0:r:mem80real REG1=XED_REG_X87PUSH:r:SUPP REG2=XED_REG_…
840 OPERANDS : REG0=XED_REG_ST0:cw:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87STATUS:w:SUPP
851 OPERANDS : REG0=XED_REG_ST0:cw:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87STATUS:w:SUPP
862 OPERANDS : REG0=XED_REG_ST0:cw:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87STATUS:w:SUPP
873 OPERANDS : REG0=XED_REG_ST0:cw:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87STATUS:w:SUPP
936 OPERANDS : REG0=XED_REG_ST0:r:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87STATUS:w:SUPP
947 OPERANDS : REG0=XED_REG_ST0:r:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87STATUS:w:SUPP
957 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:m64real REG1=XED_REG_X87STATUS:w:SUPP
967 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:m64real REG1=XED_REG_X87STATUS:w:SUPP
977 OPERANDS : REG0=XED_REG_ST0:r:IMPL:f80 MEM0:r:m64real REG1=XED_REG_X87POP:r:SUPP REG2=XED_REG_X87S…
987 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:m64real REG1=XED_REG_X87STATUS:w:SUPP
997 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:m64real REG1=XED_REG_X87STATUS:w:SUPP
1007 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:m64real REG1=XED_REG_X87STATUS:w:SUPP
1017 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:m64real REG1=XED_REG_X87STATUS:w:SUPP
1027 OPERANDS : REG0=X87():rw:f80 REG1=XED_REG_ST0:r:IMPL:f80 REG2=XED_REG_X87STATUS:w:SUPP
1037 OPERANDS : REG0=X87():rw:f80 REG1=XED_REG_ST0:r:IMPL:f80 REG2=XED_REG_X87STATUS:w:SUPP
1047 OPERANDS : REG0=X87():rw:f80 REG1=XED_REG_ST0:r:IMPL:f80 REG2=XED_REG_X87STATUS:w:SUPP
1057 OPERANDS : REG0=X87():rw:f80 REG1=XED_REG_ST0:r:IMPL:f80 REG2=XED_REG_X87STATUS:w:SUPP
1067 OPERANDS : REG0=X87():rw:f80 REG1=XED_REG_ST0:r:IMPL:f80 REG2=XED_REG_X87STATUS:w:SUPP
1077 OPERANDS : REG0=X87():rw:f80 REG1=XED_REG_ST0:r:IMPL:f80 REG2=XED_REG_X87STATUS:w:SUPP
1087 OPERANDS : REG0=XED_REG_ST0:w:IMPL:f80 MEM0:r:m64real REG1=XED_REG_X87PUSH:r:SUPP REG2=XED_REG_X8…
1097 OPERANDS : MEM0:w:m64int REG0=XED_REG_ST0:r:IMPL:f80 REG1=XED_REG_X87POP:r:SUPP REG2=XED_REG_X87ST…
1107 OPERANDS : MEM0:w:m64real REG0=XED_REG_ST0:r:IMPL:f80 REG1=XED_REG_X87STATUS:w:SUPP
1168 OPERANDS : REG0=X87():w:f80 REG1=XED_REG_ST0:r:IMPL:f80 REG2=XED_REG_X87STATUS:w:SUPP
1178 OPERANDS : REG0=XED_REG_ST0:r:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87STATUS:w:SUPP
1188 OPERANDS : REG0=XED_REG_ST0:r:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87POP:r:SUPP REG3=XED_REG_X…
1198 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:mem16int REG1=XED_REG_X87STATUS:w:SUPP
1208 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:mem16int REG1=XED_REG_X87STATUS:w:SUPP
1218 OPERANDS : REG0=XED_REG_ST0:r:IMPL:f80 MEM0:r:mem16int REG1=XED_REG_X87STATUS:w:SUPP
1228 OPERANDS : REG0=XED_REG_ST0:r:IMPL:f80 MEM0:r:mem16int REG1=XED_REG_X87POP:r:SUPP REG2=XED_REG_X87…
1238 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:mem16int REG1=XED_REG_X87STATUS:w:SUPP
1248 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:mem16int REG1=XED_REG_X87STATUS:w:SUPP
1258 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:mem16int REG1=XED_REG_X87STATUS:w:SUPP
1268 OPERANDS : REG0=XED_REG_ST0:rw:IMPL:f80 MEM0:r:mem16int REG1=XED_REG_X87STATUS:w:SUPP
1278 OPERANDS : REG0=X87():rw:f80 REG1=XED_REG_ST0:r:IMPL:f80 REG2=XED_REG_X87POP:r:SUPP REG3=XED_REG_X…
1289 OPERANDS : REG0=X87():rw:f80 REG1=XED_REG_ST0:r:IMPL:f80 REG2=XED_REG_X87POP:r:SUPP REG3=XED_REG_X…
1310 OPERANDS : REG0=X87():rw:f80 REG1=XED_REG_ST0:r:IMPL:f80 REG2=XED_REG_X87POP:r:SUPP REG3=XED_REG_X…
1322 OPERANDS : REG0=X87():rw:f80 REG1=XED_REG_ST0:r:IMPL:f80 REG2=XED_REG_X87POP:r:SUPP REG3=XED_REG_X…
1333 OPERANDS : REG0=X87():rw:f80 REG1=XED_REG_ST0:r:IMPL:f80 REG2=XED_REG_X87POP:r:SUPP REG3=XED_REG_X…
1345 OPERANDS : REG0=X87():rw:f80 REG1=XED_REG_ST0:r:IMPL:f80 REG2=XED_REG_X87POP:r:SUPP REG3=XED_REG_X…
1356 OPERANDS : REG0=XED_REG_ST0:w:IMPL:f80 MEM0:r:mem16int REG1=XED_REG_X87PUSH:r:SUPP REG2=XED_REG_X…
1366 OPERANDS : MEM0:w:mem16int REG0=XED_REG_ST0:r:IMPL:f80 REG1=XED_REG_X87POP:r:SUPP REG2=XED_REG_X87…
1376 OPERANDS : MEM0:w:mem16int REG0=XED_REG_ST0:r:IMPL:f80 REG1=XED_REG_X87STATUS:w:SUPP
1386 OPERANDS : MEM0:w:mem16int REG0=XED_REG_ST0:r:IMPL:f80 REG1=XED_REG_X87POP:r:SUPP REG2=XED_REG_X87…
1396 OPERANDS : REG0=XED_REG_ST0:w:IMPL:f80 MEM0:r:mem80dec REG1=XED_REG_X87PUSH:r:SUPP REG2=XED_REG_X…
1406 OPERANDS : REG0=XED_REG_ST0:w:IMPL:f80 MEM0:r:m64int REG1=XED_REG_X87PUSH:r:SUPP REG2=XED_REG_X87…
1416 OPERANDS : MEM0:w:mem80dec REG0=XED_REG_ST0:r:IMPL:f80 REG1=XED_REG_X87POP:r:SUPP REG2=XED_REG_X8…
1426 OPERANDS : MEM0:w:m64int REG0=XED_REG_ST0:r:IMPL:f80 REG1=XED_REG_X87POP:r:SUPP REG2=XED_REG_X87ST…
1447 OPERANDS : REG0=XED_REG_AX:w:IMPL REG1=XED_REG_X87STATUS:rw:SUPP
1458 OPERANDS : REG0=XED_REG_ST0:r:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87POP:r:SUPP REG3=XED_REG_…
1469 OPERANDS : REG0=XED_REG_ST0:r:IMPL:f80 REG1=X87():r:f80 REG2=XED_REG_X87POP:r:SUPP REG3=XED_REG_X…
2697 OPERANDS : MEM0:rw:b IMM0:r:b:IMPL
2701 OPERANDS : REG0=GPR8_B():rw IMM0:r:b:IMPL
2714 OPERANDS : MEM0:rw:v IMM0:r:b:IMPL
2718 OPERANDS : REG0=GPRv_B():rw IMM0:r:b:IMPL
2732 OPERANDS : MEM0:rw:b REG0=XED_REG_CL:r:IMPL
2734 OPERANDS : REG0=GPR8_B():rw REG1=XED_REG_CL:r:IMPL
2745 OPERANDS : MEM0:rw:v REG0=XED_REG_CL:r:IMPL
2748 OPERANDS : REG0=GPRv_B():rw REG1=XED_REG_CL:r:IMPL
2764 OPERANDS : MEM0:rw:b IMM0:r:b:IMPL
2767 OPERANDS : REG0=GPR8_B():rw IMM0:r:b:IMPL
2780 OPERANDS : MEM0:rw:v IMM0:r:b:IMPL
2784 OPERANDS : REG0=GPRv_B():rw IMM0:r:b:IMPL
2796 OPERANDS : MEM0:rw:b REG0=XED_REG_CL:r:IMPL
2798 OPERANDS : REG0=GPR8_B():rw REG1=XED_REG_CL:r:IMPL
2808 OPERANDS : MEM0:rw:v REG0=XED_REG_CL:r:IMPL
2811 OPERANDS : REG0=GPRv_B():rw REG1=XED_REG_CL:r:IMPL
2993 OPERANDS : MEM0:rw:b IMM0:r:b:IMPL
2997 OPERANDS : REG0=GPR8_B():rw IMM0:r:b:IMPL
3009 OPERANDS : MEM0:rw:b IMM0:r:b:IMPL
3013 OPERANDS : REG0=GPR8_B():rw IMM0:r:b:IMPL
3025 OPERANDS : MEM0:rw:b IMM0:r:b:IMPL
3029 OPERANDS : REG0=GPR8_B():rw IMM0:r:b:IMPL
3033 OPERANDS : MEM0:rw:b IMM0:r:b:IMPL
3037 OPERANDS : REG0=GPR8_B():rw IMM0:r:b:IMPL
3049 OPERANDS : MEM0:rw:b IMM0:r:b:IMPL
3053 OPERANDS : REG0=GPR8_B():rw IMM0:r:b:IMPL
3066 OPERANDS : MEM0:rw:b IMM0:r:b:IMPL
3069 OPERANDS : REG0=GPR8_B():rw IMM0:r:b:IMPL
3081 OPERANDS : MEM0:rw:v IMM0:r:b:IMPL
3085 OPERANDS : REG0=GPRv_B():rw IMM0:r:b:IMPL
3097 OPERANDS : MEM0:rw:v IMM0:r:b:IMPL
3101 OPERANDS : REG0=GPRv_B():rw IMM0:r:b:IMPL
3114 OPERANDS : MEM0:rw:v IMM0:r:b:IMPL
3118 OPERANDS : REG0=GPRv_B():rw IMM0:r:b:IMPL
3130 OPERANDS : MEM0:rw:v IMM0:r:b:IMPL
3134 OPERANDS : REG0=GPRv_B():rw IMM0:r:b:IMPL
3138 OPERANDS : MEM0:rw:v IMM0:r:b:IMPL
3142 OPERANDS : REG0=GPRv_B():rw IMM0:r:b:IMPL
3156 OPERANDS : MEM0:rw:v IMM0:r:b:IMPL
3160 OPERANDS : REG0=GPRv_B():rw IMM0:r:b:IMPL
3172 OPERANDS : MEM0:rw:b REG0=XED_REG_CL:r:IMPL
3174 OPERANDS : REG0=GPR8_B():rw REG1=XED_REG_CL:r:IMPL
3185 OPERANDS : MEM0:rw:b REG0=XED_REG_CL:r:IMPL
3187 OPERANDS : REG0=GPR8_B():rw REG1=XED_REG_CL:r:IMPL
3198 OPERANDS : MEM0:rw:b REG0=XED_REG_CL:r:IMPL
3202 OPERANDS : REG0=GPR8_B():rw REG1=XED_REG_CL:r:IMPL
3214 OPERANDS : MEM0:rw:b REG0=XED_REG_CL:r:IMPL
3216 OPERANDS : REG0=GPR8_B():rw REG1=XED_REG_CL:r:IMPL
3227 OPERANDS : MEM0:rw:b REG0=XED_REG_CL:r:IMPL
3231 OPERANDS : REG0=GPR8_B():rw REG1=XED_REG_CL:r:IMPL
3243 OPERANDS : MEM0:rw:b REG0=XED_REG_CL:r:IMPL
3245 OPERANDS : REG0=GPR8_B():rw REG1=XED_REG_CL:r:IMPL
3256 OPERANDS : MEM0:rw:v REG0=XED_REG_CL:r:IMPL
3266 OPERANDS : REG0=GPRv_B():rw REG1=XED_REG_CL:r:IMPL
3276 OPERANDS : MEM0:rw:v REG0=XED_REG_CL:r:IMPL
3286 OPERANDS : REG0=GPRv_B():rw REG1=XED_REG_CL:r:IMPL
3296 OPERANDS : MEM0:rw:v REG0=XED_REG_CL:r:IMPL
3307 OPERANDS : REG0=GPRv_B():rw REG1=XED_REG_CL:r:IMPL
3318 OPERANDS : MEM0:rw:v REG0=XED_REG_CL:r:IMPL
3328 OPERANDS : REG0=GPRv_B():rw REG1=XED_REG_CL:r:IMPL
3338 OPERANDS : MEM0:rw:v REG0=XED_REG_CL:r:IMPL
3349 OPERANDS : REG0=GPRv_B():rw REG1=XED_REG_CL:r:IMPL
3360 OPERANDS : MEM0:rw:v REG0=XED_REG_CL:r:IMPL
3370 OPERANDS : REG0=GPRv_B():rw REG1=XED_REG_CL:r:IMPL
5047 OPERANDS : REG0=XED_REG_AL:rw:IMPL IMM0:r:b:i8
5057 OPERANDS : REG0=OrAX():rw:IMPL IMM0:r:z
5066 OPERANDS : REG0=XED_REG_ES:r:IMPL REG1=XED_REG_STACKPUSH:w:spw:SUPP
5076 OPERANDS : REG0=XED_REG_ES:w:IMPL REG1=XED_REG_STACKPOP:r:spw:SUPP
5224 OPERANDS : REG0=XED_REG_AL:rw:IMPL IMM0:r:b
5234 OPERANDS : REG0=OrAX():rw:IMPL IMM0:r:z
5243 OPERANDS : REG0=XED_REG_CS:r:IMPL REG1=XED_REG_STACKPUSH:w:spw:SUPP
5390 OPERANDS : REG0=XED_REG_AL:rw:IMPL IMM0:r:b:i8
5400 OPERANDS : REG0=OrAX():rw:IMPL IMM0:r:z
5409 OPERANDS : REG0=XED_REG_SS:r:IMPL REG1=XED_REG_STACKPUSH:w:spw:SUPP
5420 OPERANDS : REG0=XED_REG_SS:w:IMPL REG1=XED_REG_STACKPOP:r:spw:SUPP
5541 OPERANDS : REG0=XED_REG_AL:rw:IMPL IMM0:r:b:i8
5551 OPERANDS : REG0=OrAX():rw:IMPL IMM0:r:z
5560 OPERANDS : REG0=XED_REG_DS:r:IMPL REG1=XED_REG_STACKPUSH:w:spw:SUPP
5570 OPERANDS : REG0=XED_REG_DS:w:IMPL REG1=XED_REG_STACKPOP:r:spw:SUPP
5694 OPERANDS : REG0=XED_REG_AL:rw:IMPL IMM0:r:b:i8
5704 OPERANDS : REG0=OrAX():rw:IMPL IMM0:r:z
5836 OPERANDS : REG0=XED_REG_AL:rw:IMPL IMM0:r:b:i8
5846 OPERANDS : REG0=OrAX():rw:IMPL IMM0:r:z
5980 OPERANDS : REG0=XED_REG_AL:rw:IMPL IMM0:r:b
5990 OPERANDS : REG0=OrAX():rw:IMPL IMM0:r:z
6066 OPERANDS : REG0=XED_REG_AL:r:IMPL IMM0:r:b:i8
6076 OPERANDS : REG0=OrAX():r:IMPL IMM0:r:z
6922 OPERANDS : REG0=GPRv_SB():rw REG1=OrAX():rw:IMPL
6925 OPERANDS : REG0=GPRv_SB():rw REG1=OrAX():rw:IMPL
7092 OPERANDS : REG0=XED_REG_AL:w:IMPL MEM0:r:b SEG0=FINAL_DSEG():r:SUPP BASE0=XED_REG_INVALID:r:ECOND …
7102 OPERANDS : REG0=OrAX():w:IMPL MEM0:r:v SEG0=FINAL_DSEG():r:SUPP BASE0=XED_REG_INVALID:r:ECOND INDE…
7112 OPERANDS : MEM0:w:b REG0=XED_REG_AL:r:IMPL SEG0=FINAL_DSEG():r:SUPP BASE0=XED_REG_INVALID:r:ECOND …
7122 OPERANDS : MEM0:w:v REG0=OrAX():r:IMPL SEG0=FINAL_DSEG():r:SUPP BASE0=XED_REG_INVALID:r:ECOND IND…
7417 OPERANDS : REG0=XED_REG_AL:r:IMPL IMM0:r:b:i8
7427 OPERANDS : REG0=OrAX():r:IMPL IMM0:r:z
8117 OPERANDS : REG0=XED_REG_AL:w:IMPL IMM0:r:b
8128 OPERANDS : REG0=OeAX():w:IMPL IMM0:r:b
8140 OPERANDS : IMM0:r:b REG0=XED_REG_AL:r:IMPL
8152 OPERANDS : IMM0:r:b REG0=OeAX():r:IMPL
8197 OPERANDS : REG0=XED_REG_AL:w:IMPL REG1=XED_REG_DX:r:IMPL
8207 OPERANDS : REG0=OeAX():w:IMPL REG1=XED_REG_DX:r:IMPL
8218 OPERANDS : REG0=XED_REG_DX:r:IMPL REG1=XED_REG_AL:r:IMPL
8228 OPERANDS : REG0=XED_REG_DX:r:IMPL REG1=OeAX():r:IMPL
9732 OPERANDS : REG0=XED_REG_FS:r:IMPL REG1=XED_REG_STACKPUSH:w:spw:SUPP
9742 OPERANDS : REG0=XED_REG_FS:w:IMPL REG1=XED_REG_STACKPOP:r:spw:SUPP
12428 OPERANDS : REG0=XED_REG_GS:r:IMPL REG1=XED_REG_STACKPUSH:w:spw:SUPP
12438 OPERANDS : REG0=XED_REG_GS:w:IMPL REG1=XED_REG_STACKPOP:r:spw:SUPP
12509 OPERANDS : MEM0:rcw:v REG0=GPRv_R():r REG1=XED_REG_CL:r:IMPL
12512 OPERANDS : REG0=GPRv_B():rcw REG1=GPRv_R():r REG2=XED_REG_CL:r:IMPL
12537 OPERANDS : MEM0:rcw:v REG0=GPRv_R():r REG1=XED_REG_CL:r:IMPL
12540 OPERANDS : REG0=GPRv_B():rcw REG1=GPRv_R():r REG2=XED_REG_CL:r:IMPL
15429 OPERANDS : REG0=OrAX():r:IMPL
15446 OPERANDS : REG0=OrAX():r:IMPL
15482 OPERANDS : REG0=XED_REG_EAX:r:IMPL
15491 OPERANDS : REG0=OrAX():r:IMPL REG1=XED_REG_ECX:r:IMPL
15628 OPERANDS : REG0=OrAX():r:IMPL