Lines Matching refs:cru
10 #include <dt-bindings/clock/rk3128-cru.h>
65 clocks = <&cru ARMCLK>;
175 clocks = <&cru ACLK_DMAC2>;
234 clocks = <&cru SCLK_NANDC>,
235 <&cru HCLK_NANDC>,
236 <&cru SRST_NANDC>;
246 cru: clock-controller@20000000 { label
248 compatible = "rockchip,rk3128-cru";
253 assigned-clocks = <&cru PLL_GPLL>;
264 clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
279 clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
294 clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
307 clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
309 resets = <&cru SRST_SARADC>;
320 clocks = <&cru PCLK_PWM>;
330 clocks = <&cru PCLK_PWM>;
340 clocks = <&cru PCLK_PWM>;
350 clocks = <&cru PCLK_PWM>;
384 clocks = <&cru SCLK_OTGPHY0>;
445 clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
446 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
461 clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
462 <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
470 resets = <&cru SRST_EMMC>;
482 clocks = <&cru PCLK_I2C0>;
494 clocks = <&cru PCLK_I2C1>;
506 clocks = <&cru PCLK_I2C2>;
518 clocks = <&cru PCLK_I2C3>;
533 clocks =<&cru SCLK_SPI>, <&cru PCLK_SPI>;
562 clocks = <&cru PCLK_GPIO0>;
573 clocks = <&cru PCLK_GPIO1>;
584 clocks = <&cru PCLK_GPIO2>;
595 clocks = <&cru PCLK_GPIO3>;