Lines Matching refs:cru

43 #include <dt-bindings/clock/rk3368-cru.h>
233 		rockchip,cru = <&cru>;
250 		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
251 			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
262 		clocks = <&cru HCLK_SDIO0>, <&cru SCLK_SDIO0>,
263 			 <&cru SCLK_SDIO0_DRV>, <&cru SCLK_SDIO0_SAMPLE>;
274 		clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
275 			 <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
287 		clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
295 		clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
308 		clocks = <&cru SCLK_SPI1>, <&cru PCLK_SPI1>;
321 		clocks = <&cru SCLK_SPI2>, <&cru PCLK_SPI2>;
338 		clocks = <&cru PCLK_I2C1>;
351 		clocks = <&cru PCLK_I2C3>;
364 		clocks = <&cru PCLK_I2C4>;
377 		clocks = <&cru PCLK_I2C5>;
387 		clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
401 		clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
415 		clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>;
429 		clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
511 		clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
513 		resets = <&cru SRST_TSADC>;
530 		clocks = <&cru SCLK_MAC>,
531 			<&cru SCLK_MAC_RX>, <&cru SCLK_MAC_TX>,
532 			<&cru SCLK_MACREF>, <&cru SCLK_MACREF_OUT>,
533 			<&cru ACLK_GMAC>, <&cru PCLK_GMAC>;
545 		clocks = <&cru HCLK_HOST0>;
555 		clocks = <&cru HCLK_OTG0>;
568 		clocks = <&cru PCLK_I2C0>;
585 		clocks = <&cru PCLK_I2C2>;
597 		clocks = <&cru PCLK_PWM1>;
608 		clocks = <&cru PCLK_PWM1>;
617 		clocks = <&cru PCLK_PWM1>;
628 		clocks = <&cru PCLK_PWM1>;
637 		clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
654 		clocks = <&cru PCLK_MAILBOX>;
669 	cru: clock-controller@ff760000 {  label
670 		compatible = "rockchip,rk3368-cru";
685 		clocks = <&cru PCLK_WDT>;
721 			clocks = <&cru PCLK_GPIO0>;
734 			clocks = <&cru PCLK_GPIO1>;
747 			clocks = <&cru PCLK_GPIO2>;
760 			clocks = <&cru PCLK_GPIO3>;