Lines Matching refs:mpdgctrl0
22 setbits_le32(&mmdc0->mpdgctrl0, 1 << 31); in reset_read_data_fifos()
23 wait_for_bit_le32(&mmdc0->mpdgctrl0, 1 << 31, 0, 100, 0); in reset_read_data_fifos()
25 setbits_le32(&mmdc0->mpdgctrl0, 1 << 31); in reset_read_data_fifos()
26 wait_for_bit_le32(&mmdc0->mpdgctrl0, 1 << 31, 0, 100, 0); in reset_read_data_fifos()
377 setbits_le32(&mmdc0->mpdgctrl0, 1 << 30); in mmdc_do_dqs_calibration()
379 setbits_le32(&mmdc1->mpdgctrl0, 1 << 30); in mmdc_do_dqs_calibration()
382 setbits_le32(&mmdc0->mpdgctrl0, 5 << 28); in mmdc_do_dqs_calibration()
385 wait_for_bit_le32(&mmdc0->mpdgctrl0, 1 << 28, 0, 100, 0); in mmdc_do_dqs_calibration()
392 if (readl(&mmdc0->mpdgctrl0) & 0x00001000) in mmdc_do_dqs_calibration()
395 if ((sysinfo->dsize == 0x2) && (readl(&mmdc1->mpdgctrl0) & 0x00001000)) in mmdc_do_dqs_calibration()
399 clrbits_le32(&mmdc0->mpdgctrl0, 1 << 30); in mmdc_do_dqs_calibration()
401 clrbits_le32(&mmdc1->mpdgctrl0, 1 << 30); in mmdc_do_dqs_calibration()
409 &mmdc0->mpdgctrl0); in mmdc_do_dqs_calibration()
414 &mmdc1->mpdgctrl0); in mmdc_do_dqs_calibration()
560 debug("\tMPDGCTRL0 PHY0 = 0x%08X\n", readl(&mmdc0->mpdgctrl0)); in mmdc_do_dqs_calibration()
563 debug("\tMPDGCTRL0 PHY1 = 0x%08X\n", readl(&mmdc1->mpdgctrl0)); in mmdc_do_dqs_calibration()
1104 mmdc0->mpdgctrl0 = calib->p0_mpdgctrl0; in mx6_lpddr2_cfg()
1388 mmdc0->mpdgctrl0 = calib->p0_mpdgctrl0; in mx6_ddr3_cfg()
1395 MMDC1(mpdgctrl0, calib->p1_mpdgctrl0); in mx6_ddr3_cfg()
1534 calib->p0_mpdgctrl0 = readl(&mmdc0->mpdgctrl0); in mmdc_read_calibration()
1542 calib->p1_mpdgctrl0 = readl(&mmdc1->mpdgctrl0); in mmdc_read_calibration()