Lines Matching refs:pll_cfg2
80 u32 pll_cfg0, pll_cfg1, pll_cfg2; in decode_sscg_pll() local
100 pll_cfg2 = readl(&ana_pll->sys_pll1_cfg2); in decode_sscg_pll()
115 pll_cfg2 = readl(&ana_pll->sys_pll2_cfg2); in decode_sscg_pll()
122 pll_cfg2 = readl(&ana_pll->sys_pll3_cfg2); in decode_sscg_pll()
129 pll_cfg2 = readl(&ana_pll->dram_pll_cfg2); in decode_sscg_pll()
224 divr1 = (pll_cfg2 & SSCG_PLL_REF_DIVR1_MASK) >> in decode_sscg_pll()
226 divr2 = (pll_cfg2 & SSCG_PLL_REF_DIVR2_MASK) >> in decode_sscg_pll()
228 divf1 = (pll_cfg2 & SSCG_PLL_FEEDBACK_DIV_F1_MASK) >> in decode_sscg_pll()
230 divf2 = (pll_cfg2 & SSCG_PLL_FEEDBACK_DIV_F2_MASK) >> in decode_sscg_pll()
232 divq = (pll_cfg2 & SSCG_PLL_OUTPUT_DIV_VAL_MASK) >> in decode_sscg_pll()
608 void __iomem *pll_cfg0, __iomem *pll_cfg1, __iomem *pll_cfg2; in sscg_pll_init() local
617 pll_cfg2 = &ana_pll->sys_pll1_cfg2; in sscg_pll_init()
632 pll_cfg2 = &ana_pll->sys_pll2_cfg2; in sscg_pll_init()
647 pll_cfg2 = &ana_pll->sys_pll3_cfg2; in sscg_pll_init()
662 writel(val_cfg2, pll_cfg2); in sscg_pll_init()