Lines Matching refs:mctl_ctl
106 struct sunxi_mctl_ctl_reg *mctl_ctl; in mctl_channel_init() local
110 mctl_ctl = (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL0_BASE; in mctl_channel_init()
113 mctl_ctl = (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL1_BASE; in mctl_channel_init()
117 writel(MCTL_MCMD_NOP, &mctl_ctl->mcmd); in mctl_channel_init()
118 mctl_await_completion(&mctl_ctl->mcmd, MCTL_MCMD_BUSY, 0); in mctl_channel_init()
146 writel(1, &mctl_ctl->dfitphyupdtype0); in mctl_channel_init()
199 writel(MCTL_SCTL_CONFIG, &mctl_ctl->sctl); in mctl_channel_init()
200 mctl_await_completion(&mctl_ctl->sstat, 0x07, 0x01); in mctl_channel_init()
203 writel(DRAM_CLK / 1000000, &mctl_ctl->togcnt1u); in mctl_channel_init()
205 writel(DRAM_CLK / 10000000, &mctl_ctl->togcnt100n); in mctl_channel_init()
207 writel(MCTL_TREFI, &mctl_ctl->trefi); in mctl_channel_init()
208 writel(MCTL_TMRD, &mctl_ctl->tmrd); in mctl_channel_init()
209 writel(MCTL_TRFC, &mctl_ctl->trfc); in mctl_channel_init()
210 writel((MCTL_TPREA << 16) | MCTL_TRP, &mctl_ctl->trp); in mctl_channel_init()
211 writel(MCTL_TRTW, &mctl_ctl->trtw); in mctl_channel_init()
212 writel(MCTL_TAL, &mctl_ctl->tal); in mctl_channel_init()
213 writel(MCTL_TCL, &mctl_ctl->tcl); in mctl_channel_init()
214 writel(MCTL_TCWL, &mctl_ctl->tcwl); in mctl_channel_init()
215 writel(MCTL_TRAS, &mctl_ctl->tras); in mctl_channel_init()
216 writel(MCTL_TRC, &mctl_ctl->trc); in mctl_channel_init()
217 writel(MCTL_TRCD, &mctl_ctl->trcd); in mctl_channel_init()
218 writel(MCTL_TRRD, &mctl_ctl->trrd); in mctl_channel_init()
219 writel(MCTL_TRTP, &mctl_ctl->trtp); in mctl_channel_init()
220 writel(MCTL_TWR, &mctl_ctl->twr); in mctl_channel_init()
221 writel(MCTL_TWTR, &mctl_ctl->twtr); in mctl_channel_init()
222 writel(MCTL_TEXSR, &mctl_ctl->texsr); in mctl_channel_init()
223 writel(MCTL_TXP, &mctl_ctl->txp); in mctl_channel_init()
224 writel(MCTL_TXPDLL, &mctl_ctl->txpdll); in mctl_channel_init()
225 writel(MCTL_TZQCS, &mctl_ctl->tzqcs); in mctl_channel_init()
226 writel(MCTL_TZQCSI, &mctl_ctl->tzqcsi); in mctl_channel_init()
227 writel(MCTL_TDQS, &mctl_ctl->tdqs); in mctl_channel_init()
228 writel(MCTL_TCKSRE, &mctl_ctl->tcksre); in mctl_channel_init()
229 writel(MCTL_TCKSRX, &mctl_ctl->tcksrx); in mctl_channel_init()
230 writel(MCTL_TCKE, &mctl_ctl->tcke); in mctl_channel_init()
231 writel(MCTL_TMOD, &mctl_ctl->tmod); in mctl_channel_init()
232 writel(MCTL_TRSTL, &mctl_ctl->trstl); in mctl_channel_init()
233 writel(MCTL_TZQCL, &mctl_ctl->tzqcl); in mctl_channel_init()
234 writel(MCTL_TMRR, &mctl_ctl->tmrr); in mctl_channel_init()
235 writel(MCTL_TCKESR, &mctl_ctl->tckesr); in mctl_channel_init()
236 writel(MCTL_TDPD, &mctl_ctl->tdpd); in mctl_channel_init()
239 setbits_le32(&mctl_ctl->dfiodtcfg, 1 << 3); in mctl_channel_init()
240 clrbits_le32(&mctl_ctl->dfiodtcfg1, 0x1f); in mctl_channel_init()
244 setbits_le32(&mctl_ctl->ppcfg, 1); in mctl_channel_init()
247 writel(MCTL_TCWL, &mctl_ctl->dfitphywrl); in mctl_channel_init()
248 writel(MCTL_TCL - 1, &mctl_ctl->dfitrdden); in mctl_channel_init()
249 writel(MCTL_DFITPHYRDL, &mctl_ctl->dfitphyrdl); in mctl_channel_init()
250 writel(MCTL_DFISTCFG0, &mctl_ctl->dfistcfg0); in mctl_channel_init()
252 writel(MCTL_MCFG_DDR3, &mctl_ctl->mcfg); in mctl_channel_init()
255 writel(MCTL_DFIUPDCFG_UPD, &mctl_ctl->dfiupdcfg); in mctl_channel_init()
258 writel(MCTL_SCTL_ACCESS, &mctl_ctl->sctl); in mctl_channel_init()
259 mctl_await_completion(&mctl_ctl->sstat, 0x07, 0x03); in mctl_channel_init()