51 static void mctl_dll_init(int ch_index, struct dram_sun6i_para *para)  in mctl_dll_init()  argument
64 	if (para->bus_width == 32) {  in mctl_dll_init()
74 	if (para->bus_width == 32) {  in mctl_dll_init()
84 	if (para->bus_width == 32) {  in mctl_dll_init()
102 static void mctl_channel_init(int ch_index, struct dram_sun6i_para *para)  in mctl_channel_init()  argument
166 		para->rank = 1;  in mctl_channel_init()
175 		para->chan = 1;  in mctl_channel_init()
182 		para->bus_width = 16;  in mctl_channel_init()
183 		para->page_size = 2048;  in mctl_channel_init()
243 	if (para->bus_width == 16)  in mctl_channel_init()
262 static void mctl_com_init(struct dram_sun6i_para *para)  in mctl_com_init()  argument
271 	writel(MCTL_CR_UNKNOWN | MCTL_CR_CHANNEL(para->chan) | MCTL_CR_DDR3 |  in mctl_com_init()
272 	       ((para->bus_width == 32) ? MCTL_CR_BUSW32 : MCTL_CR_BUSW16) |  in mctl_com_init()
273 	       MCTL_CR_PAGE_SIZE(para->page_size) | MCTL_CR_ROW(para->rows) |  in mctl_com_init()
274 	       MCTL_CR_BANK(1) | MCTL_CR_RANK(para->rank), &mctl_com->cr);  in mctl_com_init()
279 	if (para->chan == 1) {  in mctl_com_init()
336 	struct dram_sun6i_para para = {  in sunxi_dram_init()  local
346 		para.chan = 1;  in sunxi_dram_init()
350 	mctl_dll_init(0, &para);  in sunxi_dram_init()
353 	if (para.chan == 2) {  in sunxi_dram_init()
354 		mctl_dll_init(1, &para);  in sunxi_dram_init()
360 	mctl_channel_init(0, &para);  in sunxi_dram_init()
361 	if (para.chan == 2)  in sunxi_dram_init()
362 		mctl_channel_init(1, &para);  in sunxi_dram_init()
364 	mctl_com_init(&para);  in sunxi_dram_init()
383 	bus = (para.bus_width == 32) ? 2 : 1;  in sunxi_dram_init()
385 	para.page_size = (1 << columns) * (bus << 1);  in sunxi_dram_init()
387 			MCTL_CR_PAGE_SIZE(para.page_size));  in sunxi_dram_init()
390 	for (para.rows = 11; para.rows < 16; para.rows++) {  in sunxi_dram_init()
391 		offset = 1 << (para.rows + columns + bus);  in sunxi_dram_init()
396 			MCTL_CR_ROW(para.rows));  in sunxi_dram_init()
399 	offset = 1 << (para.rows + columns + bus + 2);  in sunxi_dram_init()
406 			MCTL_CR_CHANNEL(para.chan) | MCTL_CR_BANK(bank) |  in sunxi_dram_init()
407 			    MCTL_CR_RANK(para.rank));  in sunxi_dram_init()
409 	return 1 << (para.rank + para.rows + bank + columns + para.chan + bus);  in sunxi_dram_init()