32 static void mctl_set_cr(struct dram_para *para)  in mctl_set_cr()  argument
37 	writel(MCTL_CR_CS1_CONTROL(para->cs1) | MCTL_CR_UNKNOWN |  in mctl_set_cr()
39 	       (para->seq ? MCTL_CR_SEQUENCE : 0) |  in mctl_set_cr()
40 	       ((para->bus_width == 16) ? MCTL_CR_BUSW16 : MCTL_CR_BUSW8) |  in mctl_set_cr()
41 	       MCTL_CR_PAGE_SIZE(para->page_size) | MCTL_CR_ROW(para->rows) |  in mctl_set_cr()
42 	       MCTL_CR_BANK(para->bank) | MCTL_CR_RANK(para->rank),  in mctl_set_cr()
46 static void auto_detect_dram_size(struct dram_para *para)  in auto_detect_dram_size()  argument
48 	u8 orig_rank = para->rank;  in auto_detect_dram_size()
52 	para->page_size = 512;  in auto_detect_dram_size()
53 	para->seq = 1;  in auto_detect_dram_size()
54 	para->rows = 16;  in auto_detect_dram_size()
55 	para->rank = 1;  in auto_detect_dram_size()
56 	mctl_set_cr(para);  in auto_detect_dram_size()
63 	para->rows = 11;  in auto_detect_dram_size()
64 	para->page_size = 8192;  in auto_detect_dram_size()
65 	mctl_set_cr(para);  in auto_detect_dram_size()
71 	para->seq = 0;  in auto_detect_dram_size()
72 	para->rank = orig_rank;  in auto_detect_dram_size()
73 	para->rows = rows;  in auto_detect_dram_size()
74 	para->page_size = 1 << columns;  in auto_detect_dram_size()
75 	mctl_set_cr(para);  in auto_detect_dram_size()
86 static void auto_set_timing_para(struct dram_para *para)  in auto_set_timing_para()  argument
131 	mctl_set_cr(para);  in auto_set_timing_para()
179 static void mctl_data_train_cfg(struct dram_para *para)  in mctl_data_train_cfg()  argument
184 	if (para->rank == 2)  in mctl_data_train_cfg()
190 static int mctl_train_dram(struct dram_para *para)  in mctl_train_dram()  argument
195 	mctl_data_train_cfg(para);  in mctl_train_dram()
201 static int mctl_channel_init(struct dram_para *para)  in mctl_channel_init()  argument
210 	auto_set_timing_para(para);  in mctl_channel_init()
231 	para->cs1 = 0;  in mctl_channel_init()
232 	para->rank = 2;  in mctl_channel_init()
233 	para->bus_width = 16;  in mctl_channel_init()
234 	mctl_set_cr(para);  in mctl_channel_init()
240 	mctl_data_train_cfg(para);  in mctl_channel_init()
251 	if (mctl_train_dram(para) != 0) {  in mctl_channel_init()
259 		para->rank = 1;  in mctl_channel_init()
260 		mctl_set_cr(para);  in mctl_channel_init()
267 			para->cs1 = 1;  in mctl_channel_init()
268 			mctl_set_cr(para);  in mctl_channel_init()
269 			if (mctl_train_dram(para) == 0)  in mctl_channel_init()
275 		para->cs1 = 0;  in mctl_channel_init()
276 		para->bus_width = 8;  in mctl_channel_init()
277 		mctl_set_cr(para);  in mctl_channel_init()
278 		if (mctl_train_dram(para) != 0)  in mctl_channel_init()
294 static void mctl_sys_init(struct dram_para *para)  in mctl_sys_init()  argument
334 	struct dram_para para = {  in sunxi_dram_init()  local
343 	mctl_sys_init(&para);  in sunxi_dram_init()
345 	if (mctl_channel_init(&para) != 0)  in sunxi_dram_init()
348 	auto_detect_dram_size(&para);  in sunxi_dram_init()
354 	if (para.rank == 2)  in sunxi_dram_init()
359 	return para.page_size * (para.bus_width / 8) *  in sunxi_dram_init()
360 		(1 << (para.bank + para.rank + para.rows));  in sunxi_dram_init()