96 static int tegra_xusb_padctl_enable(struct tegra_xusb_padctl *padctl)  in tegra_xusb_padctl_enable()  argument
100 	if (padctl->enable++ > 0)  in tegra_xusb_padctl_enable()
103 	value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM);  in tegra_xusb_padctl_enable()
105 	padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM);  in tegra_xusb_padctl_enable()
109 	value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM);  in tegra_xusb_padctl_enable()
111 	padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM);  in tegra_xusb_padctl_enable()
115 	value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM);  in tegra_xusb_padctl_enable()
117 	padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM);  in tegra_xusb_padctl_enable()
122 static int tegra_xusb_padctl_disable(struct tegra_xusb_padctl *padctl)  in tegra_xusb_padctl_disable()  argument
126 	if (padctl->enable == 0) {  in tegra_xusb_padctl_disable()
131 	if (--padctl->enable > 0)  in tegra_xusb_padctl_disable()
134 	value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM);  in tegra_xusb_padctl_disable()
136 	padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM);  in tegra_xusb_padctl_disable()
140 	value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM);  in tegra_xusb_padctl_disable()
142 	padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM);  in tegra_xusb_padctl_disable()
146 	value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM);  in tegra_xusb_padctl_disable()
148 	padctl_writel(padctl, value, XUSB_PADCTL_ELPG_PROGRAM);  in tegra_xusb_padctl_disable()
157 	err = tegra_xusb_padctl_enable(phy->padctl);  in phy_prepare()
170 	return tegra_xusb_padctl_disable(phy->padctl);  in phy_unprepare()
217 	struct tegra_xusb_padctl *padctl = phy->padctl;  in pcie_phy_enable()  local
223 	value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2);  in pcie_phy_enable()
226 	padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL2);  in pcie_phy_enable()
228 	value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL5);  in pcie_phy_enable()
231 	padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL5);  in pcie_phy_enable()
233 	value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1);  in pcie_phy_enable()
235 	padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL1);  in pcie_phy_enable()
237 	value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2);  in pcie_phy_enable()
239 	padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL2);  in pcie_phy_enable()
241 	value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL8);  in pcie_phy_enable()
243 	padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL8);  in pcie_phy_enable()
245 	value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL4);  in pcie_phy_enable()
250 	padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL4);  in pcie_phy_enable()
252 	value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1);  in pcie_phy_enable()
256 	padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL1);  in pcie_phy_enable()
258 	value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1);  in pcie_phy_enable()
260 	padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL1);  in pcie_phy_enable()
262 	value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1);  in pcie_phy_enable()
264 	padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL1);  in pcie_phy_enable()
268 	value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL4);  in pcie_phy_enable()
270 	padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL4);  in pcie_phy_enable()
272 	value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2);  in pcie_phy_enable()
274 	padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL2);  in pcie_phy_enable()
281 		value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2);  in pcie_phy_enable()
291 	value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2);  in pcie_phy_enable()
293 	padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL2);  in pcie_phy_enable()
300 		value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2);  in pcie_phy_enable()
310 	value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1);  in pcie_phy_enable()
312 	padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL1);  in pcie_phy_enable()
318 		value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1);  in pcie_phy_enable()
328 	value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL8);  in pcie_phy_enable()
331 	padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL8);  in pcie_phy_enable()
337 		value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL8);  in pcie_phy_enable()
347 	value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL8);  in pcie_phy_enable()
349 	padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL8);  in pcie_phy_enable()
355 		value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL8);  in pcie_phy_enable()
365 	value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL8);  in pcie_phy_enable()
367 	padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL8);  in pcie_phy_enable()
376 	value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1);  in pcie_phy_enable()
378 	padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL1);  in pcie_phy_enable()
380 	value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2);  in pcie_phy_enable()
382 	padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL2);  in pcie_phy_enable()
384 	value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL8);  in pcie_phy_enable()
386 	padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL8);  in pcie_phy_enable()
414 		.padctl = &padctl,