• Home
  • History
  • Annotate
  • Raw
  • Download

Lines Matching refs:padctl_readl

103 	value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM);  in tegra_xusb_padctl_enable()
109 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra_xusb_padctl_enable()
115 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra_xusb_padctl_enable()
134 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra_xusb_padctl_disable()
140 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra_xusb_padctl_disable()
146 value = padctl_readl(padctl, XUSB_PADCTL_ELPG_PROGRAM); in tegra_xusb_padctl_disable()
223 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in pcie_phy_enable()
228 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL5); in pcie_phy_enable()
233 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in pcie_phy_enable()
237 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in pcie_phy_enable()
241 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL8); in pcie_phy_enable()
245 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL4); in pcie_phy_enable()
252 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in pcie_phy_enable()
258 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in pcie_phy_enable()
262 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in pcie_phy_enable()
268 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL4); in pcie_phy_enable()
272 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in pcie_phy_enable()
281 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in pcie_phy_enable()
291 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in pcie_phy_enable()
300 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in pcie_phy_enable()
310 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in pcie_phy_enable()
318 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in pcie_phy_enable()
328 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL8); in pcie_phy_enable()
337 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL8); in pcie_phy_enable()
347 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL8); in pcie_phy_enable()
355 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL8); in pcie_phy_enable()
365 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL8); in pcie_phy_enable()
376 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1); in pcie_phy_enable()
380 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2); in pcie_phy_enable()
384 value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL8); in pcie_phy_enable()