Lines Matching refs:gpio
78 gpio_t *gpio = (gpio_t *) MMAP_GPIO; in cpu_init_f() local
89 out_8(&gpio->par_fbctl, in cpu_init_f()
93 out_8(&gpio->par_be, in cpu_init_f()
142 out_8(&gpio->par_cani2c, 0xF0); in cpu_init_f()
144 out_be16(&gpio->pcr_b, 0x003C); in cpu_init_f()
146 out_8(&gpio->srcr_cani2c, 0x03); in cpu_init_f()
150 out_8(&gpio->par_ssi0h, 0xA0); in cpu_init_f()
152 out_8(&gpio->par_ssi0h, 0xA8); in cpu_init_f()
154 out_8(&gpio->par_ssi0l, 0x2); in cpu_init_f()
156 out_8(&gpio->par_cani2c, 0xAA); in cpu_init_f()
158 out_8(&gpio->par_uart0, 0xAF); in cpu_init_f()
160 out_8(&gpio->par_uart1, 0xAF); in cpu_init_f()
162 out_8(&gpio->par_uart2, 0xAF); in cpu_init_f()
164 out_be16(&gpio->pcr_h, 0xF000); in cpu_init_f()
168 out_8(&gpio->par_uart1, 0x0A); in cpu_init_f()
170 out_be16(&gpio->pcr_e, 0x0003); in cpu_init_f()
171 out_be16(&gpio->pcr_f, 0xC000); in cpu_init_f()
175 out_8(&gpio->srcr_uart, 0x00); in cpu_init_f()
191 out_8(&gpio->par_be, in cpu_init_f()
194 out_8(&gpio->par_fbctl, in cpu_init_f()
199 out_be16(&gpio->par_feci2c, in cpu_init_f()
238 gpio_t *gpio = (gpio_t *) MMAP_GPIO; in uart_port_conf() local
249 clrbits_8(&gpio->par_uart0, in uart_port_conf()
251 setbits_8(&gpio->par_uart0, in uart_port_conf()
257 clrbits_8(&gpio->par_uart1, in uart_port_conf()
259 setbits_8(&gpio->par_uart1, in uart_port_conf()
265 clrbits_8(&gpio->par_uart2, in uart_port_conf()
267 setbits_8(&gpio->par_uart2, in uart_port_conf()
273 clrbits_8(&gpio->par_dspi0, in uart_port_conf()
275 setbits_8(&gpio->par_dspi0, in uart_port_conf()
281 clrbits_8(&gpio->par_uart0, in uart_port_conf()
283 setbits_8(&gpio->par_uart0, in uart_port_conf()
289 clrbits_8(&gpio->par_uart1, in uart_port_conf()
291 setbits_8(&gpio->par_uart1, in uart_port_conf()
297 clrbits_8(&gpio->par_uart2, in uart_port_conf()
299 setbits_8(&gpio->par_uart2, in uart_port_conf()
305 clrbits_8(&gpio->par_ssi0h, ~GPIO_PAR_SSI0H_RXD_MASK); in uart_port_conf()
306 clrbits_8(&gpio->par_ssi0l, ~GPIO_PAR_SSI0L_BCLK_MASK); in uart_port_conf()
307 setbits_8(&gpio->par_ssi0h, GPIO_PAR_SSI0H_FS_U7TXD); in uart_port_conf()
308 setbits_8(&gpio->par_ssi0l, GPIO_PAR_SSI0L_BCLK_U7RXD); in uart_port_conf()
313 clrbits_8(&gpio->par_cani2c, in uart_port_conf()
315 setbits_8(&gpio->par_cani2c, in uart_port_conf()
321 clrbits_8(&gpio->par_cani2c, in uart_port_conf()
323 setbits_8(&gpio->par_cani2c, in uart_port_conf()
329 clrbits_8(&gpio->par_uart, in uart_port_conf()
331 setbits_8(&gpio->par_uart, in uart_port_conf()
336 clrbits_8(&gpio->par_uart, in uart_port_conf()
338 setbits_8(&gpio->par_uart, in uart_port_conf()
341 clrbits_be16(&gpio->par_ssi, in uart_port_conf()
343 setbits_be16(&gpio->par_ssi, in uart_port_conf()
349 clrbits_8(&gpio->par_timer, in uart_port_conf()
351 setbits_8(&gpio->par_timer, in uart_port_conf()
354 clrbits_8(&gpio->par_timer, in uart_port_conf()
356 setbits_8(&gpio->par_timer, in uart_port_conf()
367 gpio_t *gpio = (gpio_t *) MMAP_GPIO; in fecpin_setclear() local
374 setbits_be16(&gpio->par_feci2c, in fecpin_setclear()
378 setbits_be16(&gpio->par_feci2c, in fecpin_setclear()
382 setbits_be16(&gpio->par_feci2c, in fecpin_setclear()
387 setbits_8(&gpio->par_fec, GPIO_PAR_FEC_FEC0_RMII_GPIO); in fecpin_setclear()
389 setbits_8(&gpio->par_fec, GPIO_PAR_FEC_FEC1_RMII_ATA); in fecpin_setclear()
391 clrbits_be16(&gpio->par_feci2c, in fecpin_setclear()
396 setbits_8(&gpio->par_fec, GPIO_PAR_FEC_FEC0_MII); in fecpin_setclear()
398 clrbits_8(&gpio->par_fec, ~GPIO_PAR_FEC_FEC0_UNMASK); in fecpin_setclear()
402 setbits_8(&gpio->par_fec, GPIO_PAR_FEC_FEC1_MII); in fecpin_setclear()
404 clrbits_8(&gpio->par_fec, ~GPIO_PAR_FEC_FEC1_UNMASK); in fecpin_setclear()
412 out_8(&gpio->par_fec, 0x03); in fecpin_setclear()
413 out_8(&gpio->srcr_fec, 0x0F); in fecpin_setclear()
414 clrsetbits_8(&gpio->par_simp0h, ~GPIO_PAR_SIMP0H_DAT_MASK, in fecpin_setclear()
416 clrsetbits_8(&gpio->pddr_g, ~GPIO_PDDR_G4_MASK, in fecpin_setclear()
418 clrbits_8(&gpio->podr_g, ~GPIO_PODR_G4_MASK); in fecpin_setclear()
421 clrbits_8(&gpio->par_fec, ~GPIO_PAR_FEC_FEC_MASK); in fecpin_setclear()
430 gpio_t *gpio = (gpio_t *) MMAP_GPIO; in cfspi_port_conf() local
433 out_8(&gpio->par_dspi, in cfspi_port_conf()
442 out_8(&gpio->par_dspi0, in cfspi_port_conf()
445 out_8(&gpio->srcr_dspiow, 3); in cfspi_port_conf()
455 gpio_t *gpio = (gpio_t *) MMAP_GPIO; in cfspi_claim_bus() local
466 clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_PCS0); in cfspi_claim_bus()
467 setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_PCS0); in cfspi_claim_bus()
470 clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS1_PCS1); in cfspi_claim_bus()
471 setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS1_PCS1); in cfspi_claim_bus()
474 clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS2_PCS2); in cfspi_claim_bus()
475 setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS2_PCS2); in cfspi_claim_bus()
478 clrbits_8(&gpio->par_dma, ~GPIO_PAR_DMA_DACK0_UNMASK); in cfspi_claim_bus()
479 setbits_8(&gpio->par_dma, GPIO_PAR_DMA_DACK0_PCS3); in cfspi_claim_bus()
482 clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS5_PCS5); in cfspi_claim_bus()
483 setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS5_PCS5); in cfspi_claim_bus()
491 clrbits_8(&gpio->par_dspi0, ~GPIO_PAR_DSPI0_PCS0_MASK); in cfspi_claim_bus()
492 setbits_8(&gpio->par_dspi0, GPIO_PAR_DSPI0_PCS0_DSPI0PCS0); in cfspi_claim_bus()
495 clrbits_8(&gpio->par_dspiow, GPIO_PAR_DSPIOW_DSPI0PSC1); in cfspi_claim_bus()
496 setbits_8(&gpio->par_dspiow, GPIO_PAR_DSPIOW_DSPI0PSC1); in cfspi_claim_bus()
507 gpio_t *gpio = (gpio_t *) MMAP_GPIO; in cfspi_release_bus() local
515 clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_PCS0); in cfspi_release_bus()
518 clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS1_PCS1); in cfspi_release_bus()
521 clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS2_PCS2); in cfspi_release_bus()
524 clrbits_8(&gpio->par_dma, ~GPIO_PAR_DMA_DACK0_UNMASK); in cfspi_release_bus()
527 clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS5_PCS5); in cfspi_release_bus()
534 clrbits_8(&gpio->par_dspiow, GPIO_PAR_DSPIOW_DSPI0PSC1); in cfspi_release_bus()