Lines Matching refs:r3
110 mfmsr r3
111 andi. r0, r3, (MSR_IR | MSR_DR)
113 andc r3, r3, r0
115 mtspr SRR1, r3
121 stfd 1, 0(r3)
126 lfd 1, 0(r3)
173 lis r3, CONFIG_SYS_IMMR@h
174 ori r3, r3, CONFIG_SYS_IMMR@l
179 stw r3, IMMRBAR(r4)
183 lwz r6, IMMRBAR(r3)
195 1: lwz r6, 0x50b0(r3)
252 lis r3, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@h
253 ori r3, r3, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@l
256 addi r4, r3, GENERATED_GBL_DATA_SIZE
263 cmplw r3, r4
273 subi r3, r3, CONFIG_VAL(SYS_MALLOC_F_LEN)
276 stw r3, GD_MALLOC_BASE(r4)
279 stwu r0, -4(r3) /* clear final stack frame so that */
280 stwu r0, -4(r3) /* stack backtraces terminate cleanly */
283 mr r1, r3
293 lis r3, CONFIG_SYS_IMMR@h
298 li r3, 0 /* clear boot_flag for calling board_init_f */
333 addi r3,r1,STACK_FRAME_OVERHEAD
340 addi r3,r1,STACK_FRAME_OVERHEAD
490 li r3, MSR_KERNEL /* Set ME and RI flags */
491 rlwimi r3, r5, 0, 25, 25 /* preserve IP bit set by HRCW */
493 rlwimi r3, r5, 0, 21, 22 /* debugger might set SE & BE bits */
496 mtmsr r3
498 mtspr SRR1, r3 /* Make SRR1 match MSR */
501 lis r3, CONFIG_SYS_IMMR@h
507 stw r4, SWCRR(r3)
512 sth r4, SWSRR@l(r3)
514 sth r4, SWSRR@l(r3)
518 lwz r4, SWCRR(r3)
524 stw r4, SWCRR(r3)
534 lwz r4, 0x0808(r3)
536 stw r0, 0x0808(r3)
544 lis r3, CONFIG_SYS_HID0_INIT@h
545 ori r3, r3, (CONFIG_SYS_HID0_INIT | HID0_ICFI | HID0_DCFI)@l
547 mtspr HID0, r3
549 lis r3, CONFIG_SYS_HID0_FINAL@h
550 ori r3, r3, (CONFIG_SYS_HID0_FINAL & ~(HID0_ICFI | HID0_DCFI))@l
552 mtspr HID0, r3
554 lis r3, CONFIG_SYS_HID2@h
555 ori r3, r3, CONFIG_SYS_HID2@l
557 mtspr HID2, r3
571 addis r3, r0, CONFIG_SYS_IBAT0U@h
572 ori r3, r3, CONFIG_SYS_IBAT0U@l
574 mtspr IBAT0U, r3
579 addis r3, r0, CONFIG_SYS_DBAT0U@h
580 ori r3, r3, CONFIG_SYS_DBAT0U@l
582 mtspr DBAT0U, r3
587 addis r3, r0, CONFIG_SYS_IBAT1U@h
588 ori r3, r3, CONFIG_SYS_IBAT1U@l
590 mtspr IBAT1U, r3
595 addis r3, r0, CONFIG_SYS_DBAT1U@h
596 ori r3, r3, CONFIG_SYS_DBAT1U@l
598 mtspr DBAT1U, r3
603 addis r3, r0, CONFIG_SYS_IBAT2U@h
604 ori r3, r3, CONFIG_SYS_IBAT2U@l
606 mtspr IBAT2U, r3
611 addis r3, r0, CONFIG_SYS_DBAT2U@h
612 ori r3, r3, CONFIG_SYS_DBAT2U@l
614 mtspr DBAT2U, r3
619 addis r3, r0, CONFIG_SYS_IBAT3U@h
620 ori r3, r3, CONFIG_SYS_IBAT3U@l
622 mtspr IBAT3U, r3
627 addis r3, r0, CONFIG_SYS_DBAT3U@h
628 ori r3, r3, CONFIG_SYS_DBAT3U@l
630 mtspr DBAT3U, r3
636 addis r3, r0, CONFIG_SYS_IBAT4U@h
637 ori r3, r3, CONFIG_SYS_IBAT4U@l
639 mtspr IBAT4U, r3
644 addis r3, r0, CONFIG_SYS_DBAT4U@h
645 ori r3, r3, CONFIG_SYS_DBAT4U@l
647 mtspr DBAT4U, r3
652 addis r3, r0, CONFIG_SYS_IBAT5U@h
653 ori r3, r3, CONFIG_SYS_IBAT5U@l
655 mtspr IBAT5U, r3
660 addis r3, r0, CONFIG_SYS_DBAT5U@h
661 ori r3, r3, CONFIG_SYS_DBAT5U@l
663 mtspr DBAT5U, r3
668 addis r3, r0, CONFIG_SYS_IBAT6U@h
669 ori r3, r3, CONFIG_SYS_IBAT6U@l
671 mtspr IBAT6U, r3
676 addis r3, r0, CONFIG_SYS_DBAT6U@h
677 ori r3, r3, CONFIG_SYS_DBAT6U@l
679 mtspr DBAT6U, r3
684 addis r3, r0, CONFIG_SYS_IBAT7U@h
685 ori r3, r3, CONFIG_SYS_IBAT7U@l
687 mtspr IBAT7U, r3
692 addis r3, r0, CONFIG_SYS_DBAT7U@h
693 ori r3, r3, CONFIG_SYS_DBAT7U@l
695 mtspr DBAT7U, r3
719 lis r3, 0
723 tlbie r3
724 addi r3, r3, 0x1000
725 cmp 0, 0, r3, r5
738 mfspr r3, HID0
739 ori r3, r3, HID0_ICE
741 andc r3, r3, r4
742 ori r4, r3, HID0_ICFI
746 mtspr HID0, r3 /* clears invalidate */
751 mfspr r3, HID0
754 andc r3, r3, r4
756 mtspr HID0, r3 /* clears invalidate, enable and lock */
761 mfspr r3, HID0
762 rlwinm r3, r3, (31 - HID0_ICE_SHIFT + 1), 31, 31
768 mfspr r3, HID0
770 andc r3, r3, r5
771 ori r3, r3, HID0_DCE
773 mtspr HID0, r3 /* enable, no invalidate */
780 mfspr r3, HID0
782 andc r3, r3, r5
783 ori r5, r3, HID0_DCFI
787 mtspr HID0, r3 /* clears invalidate */
793 mfspr r3, HID0
794 rlwinm r3, r3, (31 - HID0_DCE_SHIFT + 1), 31, 31
799 lis r3, 0
801 1: cmp 0, 1, r3, r5
803 lwz r5, 0(r3)
805 addi r3, r3, 0x4
824 mr r1, r3 /* Set new stack pointer */
829 mr r3, r5 /* Destination Address */
855 cmplw cr1,r3,r4
863 la r7,-4(r3)
874 la r7,-4(r3)
885 30: li r3, 0
890 add r7,r3,r0
900 add r5,r3,r5
903 andc r3,r3,r0
904 mr r4,r3
910 mr r4,r3
935 la r3,GOT(_GOT2_TABLE_)
938 sub r11,r3,r11
939 addi r3,r3,-4
940 1: lwzu r0,4(r3)
944 stw r0,0(r3)
953 lwz r3,GOT(_FIXUP_TABLE_)
956 addi r3,r3,-4
958 3: lwzu r4,4(r3)
962 stw r4,0(r3)
973 lwz r3,GOT(__bss_start)
976 cmplw 0, r3, r4
981 stw r0, 0(r3)
982 addi r3, r3, 4
983 cmplw 0, r3, r4
987 mr r3, r9 /* Global Data pointer */
1050 mfmsr r3 /* now that the vectors have */
1053 andc r3, r3, r7 /* (if it was on) */
1055 mtmsr r3
1067 lis r3, (CONFIG_SYS_INIT_RAM_ADDR & ~31)@h
1068 ori r3, r3, (CONFIG_SYS_INIT_RAM_ADDR & ~31)@l
1073 dcbz r0, r3
1074 addi r3, r3, 32
1089 lis r3, (CONFIG_SYS_INIT_RAM_ADDR & ~31)@h
1090 ori r3, r3, (CONFIG_SYS_INIT_RAM_ADDR & ~31)@l
1094 1: icbi r0, r3
1095 dcbi r0, r3
1096 addi r3, r3, 32
1102 mfspr r3, HID0
1104 andc r3, r3, r5 /* no invalidate, unlock */
1105 ori r5, r3, HID0_DCFI /* invalidate, unlock */
1109 mtspr HID0, r3 /* no invalidate, unlock */
1119 lis r3, (CONFIG_SYS_IMMR)@h /* r3 <= CONFIG_SYS_IMMR */
1120 lwz r4, OR0@l(r3)
1123 stw r4, OR0@l(r3) /* OR0 <= OR0 & 0x00007FFFF */
1143 stw r4, LBLAWBAR1(r3) /* LBLAWBAR1 <= CONFIG_SYS_FLASH_BASE */
1153 stw r4, LBLAWAR1(r3) /* LBLAWAR1 <= 8MB Flash Size */
1155 lwz r4, LBLAWAR1(r3)
1166 lwz r4, BR0(r3)
1172 stw r5, BR0(r3) /* r5 <= (CONFIG_SYS_FLASH_BASE & 0xFFFF8000) | (BR0 & 0x00007FFF) */
1174 lwz r4, OR0(r3)
1177 stw r4, OR0(r3)
1181 stw r4, LBLAWBAR0(r3) /* LBLAWBAR0 <= CONFIG_SYS_FLASH_BASE */
1190 stw r4, LBLAWAR0(r3) /* LBLAWAR0 <= Flash Size */
1194 stw r4, LBLAWBAR1(r3)
1195 stw r4, LBLAWAR1(r3) /* Off LBIU LAW1 */
1197 lwz r4, LBLAWAR1(r3)