Lines Matching refs:l2cache
525 struct ccsr_cluster_l2 __iomem *l2cache; in enable_cluster_l2() local
545 l2cache = (void __iomem *)(CONFIG_SYS_FSL_CLUSTER_1_L2 + i * 0x40000); in enable_cluster_l2()
561 clrsetbits_be32(&l2cache->l2csr1, 0xff, 32 + i * 2 + 1); in enable_cluster_l2()
563 printf("enable l2 for cluster %d %p\n", i, l2cache); in enable_cluster_l2()
565 out_be32(&l2cache->l2csr0, L2CSR0_L2FI|L2CSR0_L2LFC); in enable_cluster_l2()
566 while ((in_be32(&l2cache->l2csr0) in enable_cluster_l2()
569 out_be32(&l2cache->l2csr0, L2CSR0_L2E|L2CSR0_L2PE|L2CSR0_L2REP_MODE); in enable_cluster_l2()
585 ccsr_l2cache_t *l2cache = (void __iomem *)CONFIG_SYS_MPC85xx_L2_ADDR; in l2cache_init() local
587 struct ccsr_cluster_l2 * l2cache = (void __iomem *)CONFIG_SYS_FSL_CLUSTER_1_L2; in l2cache_init() local
600 cache_ctl = l2cache->l2ctl; in l2cache_init()
605 out_be32(&l2cache->l2srbar0, 0x0); in l2cache_init()
606 out_be32(&l2cache->l2srbar1, 0x0); in l2cache_init()
609 clrbits_be32(&l2cache->l2errdis, in l2cache_init()
614 clrbits_be32(&l2cache->l2ctl, in l2cache_init()
657 if (l2cache->l2ctl & MPC85xx_L2CTL_L2E) { in l2cache_init()
660 u32 l2srbar = l2cache->l2srbar0; in l2cache_init()
661 if (l2cache->l2ctl & MPC85xx_L2CTL_L2SRAM_ENTIRE in l2cache_init()
664 l2cache->l2srbar0 = l2srbar; in l2cache_init()
671 l2cache->l2ctl = cache_ctl; /* invalidate & enable */ in l2cache_init()
704 if (l2cache->l2csr0 & L2CSR0_L2E) in l2cache_init()
705 print_size((l2cache->l2cfg0 & 0x3fff) * 64 * 1024, in l2cache_init()