Lines Matching refs:ar
39 .macro __loop_cache_all ar at insn size line_width
41 movi \ar, 0
43 __loopi \ar, \at, \size, (4 << (\line_width))
45 \insn \ar, 0 << (\line_width)
46 \insn \ar, 1 << (\line_width)
47 \insn \ar, 2 << (\line_width)
48 \insn \ar, 3 << (\line_width)
50 __endla \ar, \at, 4 << (\line_width)
55 .macro __loop_cache_range ar as at insn line_width
57 extui \at, \ar, 0, \line_width
60 __loops \ar, \as, \at, \line_width
61 \insn \ar, 0
62 __endla \ar, \at, (1 << (\line_width))
67 .macro __loop_cache_page ar at insn line_width
69 __loopi \ar, \at, PAGE_SIZE, 4 << (\line_width)
71 \insn \ar, 0 << (\line_width)
72 \insn \ar, 1 << (\line_width)
73 \insn \ar, 2 << (\line_width)
74 \insn \ar, 3 << (\line_width)
76 __endla \ar, \at, 4 << (\line_width)
81 .macro ___unlock_dcache_all ar at
84 __loop_cache_all \ar \at diu XCHAL_DCACHE_SIZE XCHAL_DCACHE_LINEWIDTH
90 .macro ___unlock_icache_all ar at
93 __loop_cache_all \ar \at iiu XCHAL_ICACHE_SIZE XCHAL_ICACHE_LINEWIDTH
99 .macro ___flush_invalidate_dcache_all ar at
102 __loop_cache_all \ar \at diwbi XCHAL_DCACHE_SIZE XCHAL_DCACHE_LINEWIDTH
108 .macro ___flush_dcache_all ar at
111 __loop_cache_all \ar \at diwb XCHAL_DCACHE_SIZE XCHAL_DCACHE_LINEWIDTH
117 .macro ___invalidate_dcache_all ar at
120 __loop_cache_all \ar \at dii __stringify(DCACHE_WAY_SIZE) \
127 .macro ___invalidate_icache_all ar at
130 __loop_cache_all \ar \at iii __stringify(ICACHE_WAY_SIZE) \
138 .macro ___flush_invalidate_dcache_range ar as at
141 __loop_cache_range \ar \as \at dhwbi XCHAL_DCACHE_LINEWIDTH
147 .macro ___flush_dcache_range ar as at
150 __loop_cache_range \ar \as \at dhwb XCHAL_DCACHE_LINEWIDTH
156 .macro ___invalidate_dcache_range ar as at
159 __loop_cache_range \ar \as \at dhi XCHAL_DCACHE_LINEWIDTH
165 .macro ___invalidate_icache_range ar as at
168 __loop_cache_range \ar \as \at ihi XCHAL_ICACHE_LINEWIDTH
175 .macro ___flush_invalidate_dcache_page ar as
178 __loop_cache_page \ar \as dhwbi XCHAL_DCACHE_LINEWIDTH
184 .macro ___flush_dcache_page ar as
187 __loop_cache_page \ar \as dhwb XCHAL_DCACHE_LINEWIDTH
193 .macro ___invalidate_dcache_page ar as
196 __loop_cache_page \ar \as dhi XCHAL_DCACHE_LINEWIDTH
202 .macro ___invalidate_icache_page ar as
205 __loop_cache_page \ar \as ihi XCHAL_ICACHE_LINEWIDTH