Lines Matching refs:pllcr0
632 u32 fcap, dcbias, bcap, pllcr1, pllcr0; in check_pll_locks() local
637 clrbits_be32(&srds_regs->bank[pll_num].pllcr0, in check_pll_locks()
645 setbits_be32(&srds_regs->bank[pll_num].pllcr0, in check_pll_locks()
663 clrbits_be32(&srds_regs->bank[pll_num].pllcr0, in check_pll_locks()
671 setbits_be32(&srds_regs->bank[pll_num].pllcr0, in check_pll_locks()
697 clrbits_be32(&srds_regs->bank[pll_num].pllcr0, in check_pll_locks()
699 pllcr0 = (in_be32 in check_pll_locks()
700 (&srds_regs->bank[pll_num].pllcr0)| in check_pll_locks()
702 out_be32(&srds_regs->bank[pll_num].pllcr0, in check_pll_locks()
703 pllcr0); in check_pll_locks()
725 clrbits_be32(&srds_regs->bank[pll_num].pllcr0, in check_pll_locks()
727 pllcr0 = (in_be32(&srds_regs->bank[pll_num].pllcr0)| in check_pll_locks()
729 out_be32(&srds_regs->bank[pll_num].pllcr0, in check_pll_locks()
730 pllcr0); in check_pll_locks()
1179 u32 pllcr0 = srds_regs->bank[i].pllcr0; in misc_init_r() local
1180 u32 expected = pllcr0 & SRDS_PLLCR0_RFCK_SEL_MASK; in misc_init_r()