Lines Matching refs:MUX_STAT_CHANGING
24 #define MUX_STAT_CHANGING 0x100 macro
31 #define MUX_STAT_CPU_CHANGING (APLL_SEL(MUX_STAT_CHANGING) | \
32 CORE_SEL(MUX_STAT_CHANGING) | \
33 HPM_SEL(MUX_STAT_CHANGING) | \
34 MPLL_USER_SEL_C(MUX_STAT_CHANGING))
100 #define MUX_STAT_DMC_CHANGING (C2C_SEL(MUX_STAT_CHANGING) | \
101 DMC_BUS_SEL(MUX_STAT_CHANGING) | \
102 DPHY_SEL(MUX_STAT_CHANGING) | \
103 MPLL_SEL(MUX_STAT_CHANGING) |\
104 G2D_ACP0_SEL(MUX_STAT_CHANGING) | \
105 G2D_ACP1_SEL(MUX_STAT_CHANGING) | \
106 G2D_ACP_SEL(MUX_STAT_CHANGING))