Lines Matching full:master

15 	a) Master and slave can be SOCs in one board or SOCs in separate boards.
18 	c) Only Master has NorFlash for booting, and all the Master's and Slave's
27 	| NorFlash|<----->| Master  |SRIO or PCIE |  Slave  |<---->[EEPROM]
53 		b) Program slave's U-Boot image, UCode, and ENV parameters into master's
56 		   environment for master.
61 		d) Restart up master and it will boot up normally from its NorFlash.
64 		e) Master will set inbound SRIO or PCIE windows covered slave's U-Boot
65 		   image stored in master's NorFlash.
66 		f) Master will set an inbound SRIO or PCIE window covered slave's UCode
67 		   and ENV stored in master's NorFlash.
68 		g) Master will set outbound SRIO or PCIE  windows in order to configure
71 		   all the above master's steps, and wait to be released by master. In the
78 		   from master.
90 	   For master, U-Boot image should be generated normally.
92 	   For example, master U-Boot image used on P4080DS should be compiled with
106 	   UCode, ENV stored in master's NorFlash, and any other configurations
111 	   or "PCIE1", "PCIE2", "PCIE3" for master, and then restart it in order to
112 	   perform the role as a master for boot from SRIO or PCIE.
114 NOTE: When the Slave's ENV parameters are stored in Master's NorFlash,
118       write Master's NorFlash by PCIE or SRIO link.