1105 static void stm32mp1_ls_osc_set(int enable, fdt_addr_t rcc, u32 offset,  in stm32mp1_ls_osc_set()  argument
1108 	u32 address = rcc + offset;  in stm32mp1_ls_osc_set()
1116 static void stm32mp1_hs_ocs_set(int enable, fdt_addr_t rcc, u32 mask_on)  in stm32mp1_hs_ocs_set()  argument
1119 		setbits_le32(rcc + RCC_OCENSETR, mask_on);  in stm32mp1_hs_ocs_set()
1121 		setbits_le32(rcc + RCC_OCENCLRR, mask_on);  in stm32mp1_hs_ocs_set()
1124 static int stm32mp1_osc_wait(int enable, fdt_addr_t rcc, u32 offset,  in stm32mp1_osc_wait()  argument
1128 	u32 address = rcc + offset;  in stm32mp1_osc_wait()
1146 static void stm32mp1_lse_enable(fdt_addr_t rcc, int bypass, int lsedrv)  in stm32mp1_lse_enable()  argument
1151 		setbits_le32(rcc + RCC_BDCR, RCC_BDCR_LSEBYP);  in stm32mp1_lse_enable()
1157 	value = (readl(rcc + RCC_BDCR) & RCC_BDCR_LSEDRV_MASK)  in stm32mp1_lse_enable()
1166 		clrsetbits_le32(rcc + RCC_BDCR,  in stm32mp1_lse_enable()
1171 	stm32mp1_ls_osc_set(1, rcc, RCC_BDCR, RCC_BDCR_LSEON);  in stm32mp1_lse_enable()
1174 static void stm32mp1_lse_wait(fdt_addr_t rcc)  in stm32mp1_lse_wait()  argument
1176 	stm32mp1_osc_wait(1, rcc, RCC_BDCR, RCC_BDCR_LSERDY);  in stm32mp1_lse_wait()
1179 static void stm32mp1_lsi_set(fdt_addr_t rcc, int enable)  in stm32mp1_lsi_set()  argument
1181 	stm32mp1_ls_osc_set(enable, rcc, RCC_RDLSICR, RCC_RDLSICR_LSION);  in stm32mp1_lsi_set()
1182 	stm32mp1_osc_wait(enable, rcc, RCC_RDLSICR, RCC_RDLSICR_LSIRDY);  in stm32mp1_lsi_set()
1185 static void stm32mp1_hse_enable(fdt_addr_t rcc, int bypass, int css)  in stm32mp1_hse_enable()  argument
1188 		setbits_le32(rcc + RCC_OCENSETR, RCC_OCENR_HSEBYP);  in stm32mp1_hse_enable()
1190 	stm32mp1_hs_ocs_set(1, rcc, RCC_OCENR_HSEON);  in stm32mp1_hse_enable()
1191 	stm32mp1_osc_wait(1, rcc, RCC_OCRDYR, RCC_OCRDYR_HSERDY);  in stm32mp1_hse_enable()
1194 		setbits_le32(rcc + RCC_OCENSETR, RCC_OCENR_HSECSSON);  in stm32mp1_hse_enable()
1197 static void stm32mp1_csi_set(fdt_addr_t rcc, int enable)  in stm32mp1_csi_set()  argument
1199 	stm32mp1_ls_osc_set(enable, rcc, RCC_OCENSETR, RCC_OCENR_CSION);  in stm32mp1_csi_set()
1200 	stm32mp1_osc_wait(enable, rcc, RCC_OCRDYR, RCC_OCRDYR_CSIRDY);  in stm32mp1_csi_set()
1203 static void stm32mp1_hsi_set(fdt_addr_t rcc, int enable)  in stm32mp1_hsi_set()  argument
1205 	stm32mp1_hs_ocs_set(enable, rcc, RCC_OCENR_HSION);  in stm32mp1_hsi_set()
1206 	stm32mp1_osc_wait(enable, rcc, RCC_OCRDYR, RCC_OCRDYR_HSIRDY);  in stm32mp1_hsi_set()
1209 static int stm32mp1_set_hsidiv(fdt_addr_t rcc, u8 hsidiv)  in stm32mp1_set_hsidiv()  argument
1211 	u32 address = rcc + RCC_OCRDYR;  in stm32mp1_set_hsidiv()
1215 	clrsetbits_le32(rcc + RCC_HSICFGR,  in stm32mp1_set_hsidiv()
1229 static int stm32mp1_hsidiv(fdt_addr_t rcc, ulong hsifreq)  in stm32mp1_hsidiv()  argument
1245 		return stm32mp1_set_hsidiv(rcc, hsidiv);  in stm32mp1_hsidiv()
1301 	fdt_addr_t rcc = priv->base;  in pll_config_output()  local
1310 	writel(value, rcc + pll[pll_id].pllxcfgr2);  in pll_config_output()
1317 	fdt_addr_t rcc = priv->base;  in pll_config()  local
1343 	writel(value, rcc + pll[pll_id].pllxcfgr1);  in pll_config()
1349 	       rcc + pll[pll_id].pllxfracr);  in pll_config()
1352 	setbits_le32(rcc + pll[pll_id].pllxfracr,  in pll_config()
1498 	fdt_addr_t rcc = priv->base;  in stm32mp1_clktree()  local
1547 		stm32mp1_lsi_set(rcc, 1);  in stm32mp1_clktree()
1559 		stm32mp1_lse_enable(rcc, bypass, lsedrv);  in stm32mp1_clktree()
1569 		stm32mp1_hse_enable(rcc, bypass, css);  in stm32mp1_clktree()
1574 	stm32mp1_csi_set(rcc, 1);  in stm32mp1_clktree()
1589 		stm32mp1_hsidiv(rcc, priv->osc[_HSI]);  in stm32mp1_clktree()
1596 	writel(clkdiv[CLKDIV_MPU] & RCC_DIVR_DIV_MASK, rcc + RCC_MPCKDIVR);  in stm32mp1_clktree()
1597 	set_clkdiv(clkdiv[CLKDIV_AXI], rcc + RCC_AXIDIVR);  in stm32mp1_clktree()
1598 	set_clkdiv(clkdiv[CLKDIV_APB4], rcc + RCC_APB4DIVR);  in stm32mp1_clktree()
1599 	set_clkdiv(clkdiv[CLKDIV_APB5], rcc + RCC_APB5DIVR);  in stm32mp1_clktree()
1600 	set_clkdiv(clkdiv[CLKDIV_MCU], rcc + RCC_MCUDIVR);  in stm32mp1_clktree()
1601 	set_clkdiv(clkdiv[CLKDIV_APB1], rcc + RCC_APB1DIVR);  in stm32mp1_clktree()
1602 	set_clkdiv(clkdiv[CLKDIV_APB2], rcc + RCC_APB2DIVR);  in stm32mp1_clktree()
1603 	set_clkdiv(clkdiv[CLKDIV_APB3], rcc + RCC_APB3DIVR);  in stm32mp1_clktree()
1606 	writel(clkdiv[CLKDIV_RTC] & RCC_DIVR_DIV_MASK, rcc + RCC_RTCDIVR);  in stm32mp1_clktree()
1647 		stm32mp1_lse_wait(rcc);  in stm32mp1_clktree()
1686 		stm32mp1_hsi_set(rcc, 0);  in stm32mp1_clktree()