Lines Matching refs:cru
38 static int rkclk_set_pll(struct rk3128_cru *cru, enum rk_clk_id clk_id, in rkclk_set_pll() argument
42 struct rk3128_pll *pll = &cru->pll[pll_id]; in rkclk_set_pll()
140 static void rkclk_init(struct rk3128_cru *cru) in rkclk_init() argument
147 rk_clrsetreg(&cru->cru_mode_con, in rkclk_init()
153 rkclk_set_pll(cru, CLK_ARM, &apll_init_cfg); in rkclk_init()
154 rkclk_set_pll(cru, CLK_GENERAL, &gpll_init_cfg); in rkclk_init()
167 rk_clrsetreg(&cru->cru_clksel_con[0], in rkclk_init()
172 rk_clrsetreg(&cru->cru_clksel_con[1], in rkclk_init()
190 rk_clrsetreg(&cru->cru_clksel_con[0], in rkclk_init()
195 rk_clrsetreg(&cru->cru_clksel_con[1], in rkclk_init()
215 rk_clrsetreg(&cru->cru_clksel_con[10], in rkclk_init()
224 rk_clrsetreg(&cru->cru_mode_con, in rkclk_init()
231 rk_clrsetreg(&cru->cru_clksel_con[2], in rkclk_init()
238 static u32 rkclk_pll_get_rate(struct rk3128_cru *cru, in rkclk_pll_get_rate() argument
244 struct rk3128_pll *pll = &cru->pll[pll_id]; in rkclk_pll_get_rate()
256 con = readl(&cru->cru_mode_con); in rkclk_pll_get_rate()
278 static ulong rockchip_mmc_get_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_get_clk() argument
289 con = readl(&cru->cru_clksel_con[12]); in rockchip_mmc_get_clk()
295 con = readl(&cru->cru_clksel_con[11]); in rockchip_mmc_get_clk()
307 static ulong rockchip_mmc_set_clk(struct rk3128_cru *cru, uint clk_general_rate, in rockchip_mmc_set_clk() argument
327 rk_clrsetreg(&cru->cru_clksel_con[12], in rockchip_mmc_set_clk()
334 rk_clrsetreg(&cru->cru_clksel_con[11], in rockchip_mmc_set_clk()
343 return rockchip_mmc_get_clk(cru, clk_general_rate, periph); in rockchip_mmc_set_clk()
346 static ulong rk3128_peri_get_pclk(struct rk3128_cru *cru, ulong clk_id) in rk3128_peri_get_pclk() argument
356 con = readl(&cru->cru_clksel_con[10]); in rk3128_peri_get_pclk()
367 static ulong rk3128_peri_set_pclk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_peri_set_pclk() argument
380 rk_setreg(&cru->cru_clksel_con[10], in rk3128_peri_set_pclk()
391 static ulong rk3128_saradc_get_clk(struct rk3128_cru *cru) in rk3128_saradc_get_clk() argument
395 val = readl(&cru->cru_clksel_con[24]); in rk3128_saradc_get_clk()
402 static ulong rk3128_saradc_set_clk(struct rk3128_cru *cru, uint hz) in rk3128_saradc_set_clk() argument
409 rk_clrsetreg(&cru->cru_clksel_con[24], in rk3128_saradc_set_clk()
413 return rk3128_saradc_get_clk(cru); in rk3128_saradc_set_clk()
416 static ulong rk3128_vop_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz) in rk3128_vop_set_clk() argument
426 rk_clrsetreg(&cru->cru_clksel_con[31], in rk3128_vop_set_clk()
432 rk_clrsetreg(&cru->cru_clksel_con[31], in rk3128_vop_set_clk()
440 rkclk_set_pll(cru, CLK_CODEC, &cpll_config); in rk3128_vop_set_clk()
442 rk_clrsetreg(&cru->cru_clksel_con[27], in rk3128_vop_set_clk()
455 static ulong rk3128_vop_get_rate(struct rk3128_cru *cru, ulong clk_id) in rk3128_vop_get_rate() argument
461 con = readl(&cru->cru_clksel_con[31]); in rk3128_vop_get_rate()
466 con = readl(&cru->cru_clksel_con[31]); in rk3128_vop_get_rate()
471 con = readl(&cru->cru_clksel_con[27]); in rk3128_vop_get_rate()
473 parent = rkclk_pll_get_rate(cru, CLK_CODEC); in rk3128_vop_get_rate()
487 return rkclk_pll_get_rate(priv->cru, clk->id); in rk3128_clk_get_rate()
493 return rk3128_peri_get_pclk(priv->cru, clk->id); in rk3128_clk_get_rate()
495 return rk3128_saradc_get_clk(priv->cru); in rk3128_clk_get_rate()
499 return rk3128_vop_get_rate(priv->cru, clk->id); in rk3128_clk_get_rate()
510 gclk_rate = rkclk_pll_get_rate(priv->cru, CLK_GENERAL); in rk3128_clk_set_rate()
517 new_rate = rk3128_vop_set_clk(priv->cru, in rk3128_clk_set_rate()
521 new_rate = rockchip_mmc_set_clk(priv->cru, gclk_rate, in rk3128_clk_set_rate()
529 new_rate = rk3128_peri_set_pclk(priv->cru, clk->id, rate); in rk3128_clk_set_rate()
532 new_rate = rk3128_saradc_set_clk(priv->cru, rate); in rk3128_clk_set_rate()
550 priv->cru = dev_read_addr_ptr(dev); in rk3128_clk_ofdata_to_platdata()
559 rkclk_init(priv->cru); in rk3128_clk_probe()