206 static void rkclk_set_pll(struct rk3328_cru *cru, enum rk_clk_id clk_id,  in rkclk_set_pll()  argument
216 		pll_con = cru->apll_con;  in rkclk_set_pll()
220 		pll_con = cru->dpll_con;  in rkclk_set_pll()
224 		pll_con = cru->cpll_con;  in rkclk_set_pll()
228 		pll_con = cru->gpll_con;  in rkclk_set_pll()
232 		pll_con = cru->npll_con;  in rkclk_set_pll()
256 	rk_clrsetreg(&cru->mode_con, mode_mask, PLL_MODE_SLOW << mode_shift);  in rkclk_set_pll()
276 	rk_clrsetreg(&cru->mode_con, mode_mask, PLL_MODE_NORM << mode_shift);  in rkclk_set_pll()
279 static void rkclk_init(struct rk3328_cru *cru)  in rkclk_init()  argument
286 	rkclk_set_pll(cru, CLK_GENERAL, &gpll_init_cfg);  in rkclk_init()
287 	rkclk_set_pll(cru, CLK_CODEC, &cpll_init_cfg);  in rkclk_init()
294 	rk_clrsetreg(&cru->clksel_con[28],  in rkclk_init()
298 	rk_clrsetreg(&cru->clksel_con[29],  in rkclk_init()
304 void rk3328_configure_cpu(struct rk3328_cru *cru,  in rk3328_configure_cpu()  argument
311 	rkclk_set_pll(cru, CLK_ARM, apll_cfgs[apll_freq]);  in rk3328_configure_cpu()
317 	rk_clrsetreg(&cru->clksel_con[0],  in rk3328_configure_cpu()
322 	rk_clrsetreg(&cru->clksel_con[1],  in rk3328_configure_cpu()
329 static ulong rk3328_i2c_get_clk(struct rk3328_cru *cru, ulong clk_id)  in rk3328_i2c_get_clk()  argument
335 		con = readl(&cru->clksel_con[34]);  in rk3328_i2c_get_clk()
339 		con = readl(&cru->clksel_con[34]);  in rk3328_i2c_get_clk()
343 		con = readl(&cru->clksel_con[35]);  in rk3328_i2c_get_clk()
347 		con = readl(&cru->clksel_con[35]);  in rk3328_i2c_get_clk()
358 static ulong rk3328_i2c_set_clk(struct rk3328_cru *cru, ulong clk_id, uint hz)  in rk3328_i2c_set_clk()  argument
367 		rk_clrsetreg(&cru->clksel_con[34],  in rk3328_i2c_set_clk()
374 		rk_clrsetreg(&cru->clksel_con[34],  in rk3328_i2c_set_clk()
381 		rk_clrsetreg(&cru->clksel_con[35],  in rk3328_i2c_set_clk()
388 		rk_clrsetreg(&cru->clksel_con[35],  in rk3328_i2c_set_clk()
402 static ulong rk3328_gmac2io_set_clk(struct rk3328_cru *cru, ulong rate)  in rk3328_gmac2io_set_clk()  argument
418 		u32 con = readl(&cru->clksel_con[27]);  in rk3328_gmac2io_set_clk()
429 			rk_clrsetreg(&cru->clksel_con[27], GMAC2IO_CLK_DIV_MASK,  in rk3328_gmac2io_set_clk()
440 static ulong rk3328_mmc_get_clk(struct rk3328_cru *cru, uint clk_id)  in rk3328_mmc_get_clk()  argument
456 	con = readl(&cru->clksel_con[con_id]);  in rk3328_mmc_get_clk()
466 static ulong rk3328_mmc_set_clk(struct rk3328_cru *cru,  in rk3328_mmc_set_clk()  argument
491 		rk_clrsetreg(&cru->clksel_con[con_id],  in rk3328_mmc_set_clk()
496 		rk_clrsetreg(&cru->clksel_con[con_id],  in rk3328_mmc_set_clk()
502 	return rk3328_mmc_get_clk(cru, clk_id);  in rk3328_mmc_set_clk()
505 static ulong rk3328_pwm_get_clk(struct rk3328_cru *cru)  in rk3328_pwm_get_clk()  argument
509 	con = readl(&cru->clksel_con[24]);  in rk3328_pwm_get_clk()
515 static ulong rk3328_pwm_set_clk(struct rk3328_cru *cru, uint hz)  in rk3328_pwm_set_clk()  argument
519 	rk_clrsetreg(&cru->clksel_con[24],  in rk3328_pwm_set_clk()
527 static ulong rk3328_saradc_get_clk(struct rk3328_cru *cru)  in rk3328_saradc_get_clk()  argument
531 	val = readl(&cru->clksel_con[23]);  in rk3328_saradc_get_clk()
538 static ulong rk3328_saradc_set_clk(struct rk3328_cru *cru, uint hz)  in rk3328_saradc_set_clk()  argument
545 	rk_clrsetreg(&cru->clksel_con[23],  in rk3328_saradc_set_clk()
549 	return rk3328_saradc_get_clk(cru);  in rk3328_saradc_set_clk()
564 		rate = rk3328_mmc_get_clk(priv->cru, clk->id);  in rk3328_clk_get_rate()
570 		rate = rk3328_i2c_get_clk(priv->cru, clk->id);  in rk3328_clk_get_rate()
573 		rate = rk3328_pwm_get_clk(priv->cru);  in rk3328_clk_get_rate()
576 		rate = rk3328_saradc_get_clk(priv->cru);  in rk3328_clk_get_rate()
597 		ret = rk3328_mmc_set_clk(priv->cru, clk->id, rate);  in rk3328_clk_set_rate()
603 		ret = rk3328_i2c_set_clk(priv->cru, clk->id, rate);  in rk3328_clk_set_rate()
606 		ret = rk3328_gmac2io_set_clk(priv->cru, rate);  in rk3328_clk_set_rate()
609 		ret = rk3328_pwm_set_clk(priv->cru, rate);  in rk3328_clk_set_rate()
612 		ret = rk3328_saradc_set_clk(priv->cru, rate);  in rk3328_clk_set_rate()
758 	rkclk_init(priv->cru);  in rk3328_clk_probe()
767 	priv->cru = dev_read_addr_ptr(dev);  in rk3328_clk_ofdata_to_platdata()