61 static uint32_t rkclk_pll_get_rate(struct rk3368_cru *cru,  in rkclk_pll_get_rate()  argument
66 	struct rk3368_pll *pll = &cru->pll[pll_id];  in rkclk_pll_get_rate()
88 static int rkclk_set_pll(struct rk3368_cru *cru, enum rk3368_pll_id pll_id,  in rkclk_set_pll()  argument
91 	struct rk3368_pll *pll = &cru->pll[pll_id];  in rkclk_set_pll()
130 static void rkclk_init(struct rk3368_cru *cru)  in rkclk_init()  argument
134 	rkclk_set_pll(cru, APLLB, &apll_b_init_cfg);  in rkclk_init()
135 	rkclk_set_pll(cru, APLLL, &apll_l_init_cfg);  in rkclk_init()
141 	rkclk_set_pll(cru, GPLL, &gpll_init_cfg);  in rkclk_init()
142 	rkclk_set_pll(cru, CPLL, &cpll_init_cfg);  in rkclk_init()
145 	apllb = rkclk_pll_get_rate(cru, APLLB);  in rkclk_init()
146 	aplll = rkclk_pll_get_rate(cru, APLLL);  in rkclk_init()
147 	dpll = rkclk_pll_get_rate(cru, DPLL);  in rkclk_init()
148 	cpll = rkclk_pll_get_rate(cru, CPLL);  in rkclk_init()
149 	gpll = rkclk_pll_get_rate(cru, GPLL);  in rkclk_init()
157 static ulong rk3368_mmc_get_clk(struct rk3368_cru *cru, uint clk_id)  in rk3368_mmc_get_clk()  argument
176 	con = readl(&cru->clksel_con[con_id]);  in rk3368_mmc_get_clk()
179 		pll_rate = rkclk_pll_get_rate(cru, GPLL);  in rk3368_mmc_get_clk()
185 		pll_rate = rkclk_pll_get_rate(cru, CPLL);  in rk3368_mmc_get_clk()
252 	struct rk3368_cru *cru = priv->cru;  in rk3368_mmc_set_clk()  local
273 	rk_clrsetreg(&cru->clksel_con[con_id],  in rk3368_mmc_set_clk()
277 	return rk3368_mmc_get_clk(cru, clk_id);  in rk3368_mmc_set_clk()
282 static ulong rk3368_ddr_set_clk(struct rk3368_cru *cru, ulong set_rate)  in rk3368_ddr_set_clk()  argument
305 	rkclk_set_pll(cru, DPLL, dpll_cfg);  in rk3368_ddr_set_clk()
312 static ulong rk3368_gmac_set_clk(struct rk3368_cru *cru, ulong set_rate)  in rk3368_gmac_set_clk()  argument
320 	if (readl(&cru->clksel_con[43]) & GMAC_MUX_SEL_EXTCLK) {  in rk3368_gmac_set_clk()
324 		u32 con = readl(&cru->clksel_con[43]);  in rk3368_gmac_set_clk()
340 			rk_clrsetreg(&cru->clksel_con[43], GMAC_DIV_CON_MASK,  in rk3368_gmac_set_clk()
378 static ulong rk3368_spi_get_clk(struct rk3368_cru *cru, ulong clk_id)  in rk3368_spi_get_clk()  argument
393 	val = readl(&cru->clksel_con[spiclk->reg]);  in rk3368_spi_get_clk()
400 static ulong rk3368_spi_set_clk(struct rk3368_cru *cru, ulong clk_id, uint hz)  in rk3368_spi_set_clk()  argument
418 	rk_clrsetreg(&cru->clksel_con[spiclk->reg],  in rk3368_spi_set_clk()
424 	return rk3368_spi_get_clk(cru, clk_id);  in rk3368_spi_set_clk()
427 static ulong rk3368_saradc_get_clk(struct rk3368_cru *cru)  in rk3368_saradc_get_clk()  argument
431 	val = readl(&cru->clksel_con[25]);  in rk3368_saradc_get_clk()
438 static ulong rk3368_saradc_set_clk(struct rk3368_cru *cru, uint hz)  in rk3368_saradc_set_clk()  argument
445 	rk_clrsetreg(&cru->clksel_con[25],  in rk3368_saradc_set_clk()
449 	return rk3368_saradc_get_clk(cru);  in rk3368_saradc_set_clk()
460 		rate = rkclk_pll_get_rate(priv->cru, CPLL);  in rk3368_clk_get_rate()
463 		rate = rkclk_pll_get_rate(priv->cru, GPLL);  in rk3368_clk_get_rate()
466 		rate = rk3368_spi_get_clk(priv->cru, clk->id);  in rk3368_clk_get_rate()
471 		rate = rk3368_mmc_get_clk(priv->cru, clk->id);  in rk3368_clk_get_rate()
475 		rate = rk3368_saradc_get_clk(priv->cru);  in rk3368_clk_get_rate()
492 		ret = rk3368_spi_set_clk(priv->cru, clk->id, rate);  in rk3368_clk_set_rate()
496 		ret = rk3368_ddr_set_clk(priv->cru, rate);  in rk3368_clk_set_rate()
508 		ret = rk3368_gmac_set_clk(priv->cru, rate);  in rk3368_clk_set_rate()
512 		ret =  rk3368_saradc_set_clk(priv->cru, rate);  in rk3368_clk_set_rate()
524 	struct rk3368_cru *cru = priv->cru;  in rk3368_gmac_set_parent()  local
535 		rk_clrreg(&cru->clksel_con[43], GMAC_MUX_SEL_EXTCLK);  in rk3368_gmac_set_parent()
551 		rk_setreg(&cru->clksel_con[43], GMAC_MUX_SEL_EXTCLK);  in rk3368_gmac_set_parent()
602 	priv->cru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);  in rk3368_clk_probe()
605 	rkclk_init(priv->cru);  in rk3368_clk_probe()
616 	priv->cru = dev_read_addr_ptr(dev);  in rk3368_clk_ofdata_to_platdata()