398 void rk3399_configure_cpu(struct rk3399_cru *cru,  in rk3399_configure_cpu()  argument
405 	rkclk_set_pll(&cru->apll_l_con[0], apll_l_cfgs[apll_l_freq]);  in rk3399_configure_cpu()
419 	rk_clrsetreg(&cru->clksel_con[0],  in rk3399_configure_cpu()
426 	rk_clrsetreg(&cru->clksel_con[1],  in rk3399_configure_cpu()
455 static ulong rk3399_i2c_get_clk(struct rk3399_cru *cru, ulong clk_id)  in rk3399_i2c_get_clk()  argument
461 		con = readl(&cru->clksel_con[61]);  in rk3399_i2c_get_clk()
465 		con = readl(&cru->clksel_con[62]);  in rk3399_i2c_get_clk()
469 		con = readl(&cru->clksel_con[63]);  in rk3399_i2c_get_clk()
473 		con = readl(&cru->clksel_con[61]);  in rk3399_i2c_get_clk()
477 		con = readl(&cru->clksel_con[62]);  in rk3399_i2c_get_clk()
481 		con = readl(&cru->clksel_con[63]);  in rk3399_i2c_get_clk()
492 static ulong rk3399_i2c_set_clk(struct rk3399_cru *cru, ulong clk_id, uint hz)  in rk3399_i2c_set_clk()  argument
502 		rk_clrsetreg(&cru->clksel_con[61], I2C_CLK_REG_MASK(1),  in rk3399_i2c_set_clk()
506 		rk_clrsetreg(&cru->clksel_con[62], I2C_CLK_REG_MASK(2),  in rk3399_i2c_set_clk()
510 		rk_clrsetreg(&cru->clksel_con[63], I2C_CLK_REG_MASK(3),  in rk3399_i2c_set_clk()
514 		rk_clrsetreg(&cru->clksel_con[61], I2C_CLK_REG_MASK(5),  in rk3399_i2c_set_clk()
518 		rk_clrsetreg(&cru->clksel_con[62], I2C_CLK_REG_MASK(6),  in rk3399_i2c_set_clk()
522 		rk_clrsetreg(&cru->clksel_con[63], I2C_CLK_REG_MASK(7),  in rk3399_i2c_set_clk()
530 	return rk3399_i2c_get_clk(cru, clk_id);  in rk3399_i2c_set_clk()
569 static ulong rk3399_spi_get_clk(struct rk3399_cru *cru, ulong clk_id)  in rk3399_spi_get_clk()  argument
584 	val = readl(&cru->clksel_con[spiclk->reg]);  in rk3399_spi_get_clk()
591 static ulong rk3399_spi_set_clk(struct rk3399_cru *cru, ulong clk_id, uint hz)  in rk3399_spi_set_clk()  argument
609 	rk_clrsetreg(&cru->clksel_con[spiclk->reg],  in rk3399_spi_set_clk()
615 	return rk3399_spi_get_clk(cru, clk_id);  in rk3399_spi_set_clk()
618 static ulong rk3399_vop_set_clk(struct rk3399_cru *cru, ulong clk_id, u32 hz)  in rk3399_vop_set_clk()  argument
627 		aclkreg_addr = &cru->clksel_con[47];  in rk3399_vop_set_clk()
628 		dclkreg_addr = &cru->clksel_con[49];  in rk3399_vop_set_clk()
631 		aclkreg_addr = &cru->clksel_con[48];  in rk3399_vop_set_clk()
632 		dclkreg_addr = &cru->clksel_con[50];  in rk3399_vop_set_clk()
650 	rkclk_set_pll(&cru->vpll_con[0], &vpll_config);  in rk3399_vop_set_clk()
662 static ulong rk3399_mmc_get_clk(struct rk3399_cru *cru, uint clk_id)  in rk3399_mmc_get_clk()  argument
669 		con = readl(&cru->clksel_con[16]);  in rk3399_mmc_get_clk()
674 		con = readl(&cru->clksel_con[21]);  in rk3399_mmc_get_clk()
689 static ulong rk3399_mmc_set_clk(struct rk3399_cru *cru,  in rk3399_mmc_set_clk()  argument
706 			rk_clrsetreg(&cru->clksel_con[16],  in rk3399_mmc_set_clk()
711 			rk_clrsetreg(&cru->clksel_con[16],  in rk3399_mmc_set_clk()
722 		rk_clrsetreg(&cru->clksel_con[21],  in rk3399_mmc_set_clk()
731 		rk_clrsetreg(&cru->clksel_con[22],  in rk3399_mmc_set_clk()
739 	return rk3399_mmc_get_clk(cru, clk_id);  in rk3399_mmc_set_clk()
742 static ulong rk3399_gmac_set_clk(struct rk3399_cru *cru, ulong rate)  in rk3399_gmac_set_clk()  argument
750 	if (readl(&cru->clksel_con[19]) & BIT(4)) {  in rk3399_gmac_set_clk()
767 static ulong rk3399_ddr_set_clk(struct rk3399_cru *cru,  in rk3399_ddr_set_clk()  argument
800 	rkclk_set_pll(&cru->dpll_con[0], &dpll_cfg);  in rk3399_ddr_set_clk()
805 static ulong rk3399_saradc_get_clk(struct rk3399_cru *cru)  in rk3399_saradc_get_clk()  argument
809 	val = readl(&cru->clksel_con[26]);  in rk3399_saradc_get_clk()
816 static ulong rk3399_saradc_set_clk(struct rk3399_cru *cru, uint hz)  in rk3399_saradc_set_clk()  argument
823 	rk_clrsetreg(&cru->clksel_con[26],  in rk3399_saradc_set_clk()
827 	return rk3399_saradc_get_clk(cru);  in rk3399_saradc_set_clk()
841 		rate = rk3399_mmc_get_clk(priv->cru, clk->id);  in rk3399_clk_get_rate()
849 		rate = rk3399_i2c_get_clk(priv->cru, clk->id);  in rk3399_clk_get_rate()
852 		rate = rk3399_spi_get_clk(priv->cru, clk->id);  in rk3399_clk_get_rate()
866 		rate = rk3399_saradc_get_clk(priv->cru);  in rk3399_clk_get_rate()
904 		ret = rk3399_mmc_set_clk(priv->cru, clk->id, rate);  in rk3399_clk_set_rate()
907 		ret = rk3399_gmac_set_clk(priv->cru, rate);  in rk3399_clk_set_rate()
915 		ret = rk3399_i2c_set_clk(priv->cru, clk->id, rate);  in rk3399_clk_set_rate()
918 		ret = rk3399_spi_set_clk(priv->cru, clk->id, rate);  in rk3399_clk_set_rate()
926 		ret = rk3399_vop_set_clk(priv->cru, clk->id, rate);  in rk3399_clk_set_rate()
929 		ret = rk3399_ddr_set_clk(priv->cru, rate);  in rk3399_clk_set_rate()
934 		ret = rk3399_saradc_set_clk(priv->cru, rate);  in rk3399_clk_set_rate()
955 		rk_clrreg(&priv->cru->clksel_con[19], BIT(4));  in rk3399_gmac_set_parent()
971 		rk_setreg(&priv->cru->clksel_con[19], BIT(4));  in rk3399_gmac_set_parent()
1023 static void rkclk_init(struct rk3399_cru *cru)  in rkclk_init()  argument
1029 	rk3399_configure_cpu(cru, APLL_L_600_MHZ);  in rkclk_init()
1035 	rk_clrsetreg(&cru->clksel_con[12], 0xffff, 0x4101);  in rkclk_init()
1036 	rk_clrsetreg(&cru->clksel_con[19], 0xffff, 0x033f);  in rkclk_init()
1037 	rk_clrsetreg(&cru->clksel_con[56], 0x0003, 0x0003);  in rkclk_init()
1040 	rkclk_set_pll(&cru->gpll_con[0], &gpll_init_cfg);  in rkclk_init()
1041 	rkclk_set_pll(&cru->cpll_con[0], &cpll_init_cfg);  in rkclk_init()
1055 	rk_clrsetreg(&cru->clksel_con[14],  in rkclk_init()
1075 	rk_clrsetreg(&cru->clksel_con[23],  in rkclk_init()
1092 	rk_clrsetreg(&cru->clksel_con[25],  in rkclk_init()
1109 	priv->cru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);  in rk3399_clk_probe()
1111 	rkclk_init(priv->cru);  in rk3399_clk_probe()
1121 	priv->cru = dev_read_addr_ptr(dev);  in rk3399_clk_ofdata_to_platdata()