112 	outb(((dev & 0x7f) << 1) | 1, base + SMBXMITADD);  in smbus_block_read()
114 	outb(offset & 0xff, base + SMBHSTCMD);  in smbus_block_read()
116 	outb((inb(base + SMBHSTCTL) & (~(0x7) << 2)) | (0x5 << 2),  in smbus_block_read()
119 	outb(inb(base + SMBHSTSTAT), base + SMBHSTSTAT);  in smbus_block_read()
122 	outb((inb(base + SMBHSTCTL) | SMBHSTCNT_START), base + SMBHSTCTL);  in smbus_block_read()
172 	outb(((dev & 0x7f) << 1) & ~0x01, base + SMBXMITADD);  in smbus_block_write()
174 	outb(offset, base + SMBHSTCMD);  in smbus_block_write()
176 	outb((inb(base + SMBHSTCTL) & (~(0x7) << 2)) | (0x5 << 2),  in smbus_block_write()
179 	outb(inb(base + SMBHSTSTAT), base + SMBHSTSTAT);  in smbus_block_write()
182 	outb(len, base + SMBHSTDAT0);  in smbus_block_write()
186 		outb(*buffer++, base + SMBBLKDAT);  in smbus_block_write()
189 	outb((inb(base + SMBHSTCTL) | SMBHSTCNT_START), base + SMBHSTCTL);  in smbus_block_write()
261 	outb(inb(base + SMBHSTCTL) & ~SMBHSTCNT_INTREN, base + SMBHSTCTL);  in intel_i2c_probe()
264 	outb(inb(base + SMBAUXCTL) | SMBAUXCTL_E32B, base + SMBAUXCTL);  in intel_i2c_probe()