36 static struct mxc_nand_host *host = &mxc_host;  variable
112 static void wait_op_done(struct mxc_nand_host *host, int max_retries,  argument
119 		tmp = readnfc(&host->regs->config2);
122 			writenfc(tmp, &host->regs->config2);
124 		tmp = readnfc(&host->ip_regs->ipc);
127 			writenfc(tmp, &host->ip_regs->ipc);
143 static void send_cmd(struct mxc_nand_host *host, uint16_t cmd)  argument
147 	writenfc(cmd, &host->regs->flash_cmd);
148 	writenfc(NFC_CMD, &host->regs->operation);
151 	wait_op_done(host, TROP_US_DELAY, cmd);
159 static void send_addr(struct mxc_nand_host *host, uint16_t addr)  argument
163 	writenfc(addr, &host->regs->flash_addr);
164 	writenfc(NFC_ADDR, &host->regs->operation);
167 	wait_op_done(host, TROP_US_DELAY, addr);
174 static void send_prog_page(struct mxc_nand_host *host, uint8_t buf_id,  argument
189 			void __iomem *src = &host->regs->spare_area[0][i * 16];
190 			void __iomem *dst = &host->regs->spare_area[i][0];
197 	writenfc(buf_id, &host->regs->buf_addr);
199 	uint32_t tmp = readnfc(&host->regs->config1);
202 	writenfc(tmp, &host->regs->config1);
206 	if (!host->pagesize_2k) {
207 		uint32_t config1 = readnfc(&host->regs->config1);
212 		writenfc(config1, &host->regs->config1);
215 	writenfc(NFC_INPUT, &host->regs->operation);
218 	wait_op_done(host, TROP_US_DELAY, spare_only);
225 static void send_read_page(struct mxc_nand_host *host, uint8_t buf_id,  argument
231 	writenfc(buf_id, &host->regs->buf_addr);
233 	uint32_t tmp = readnfc(&host->regs->config1);
236 	writenfc(tmp, &host->regs->config1);
240 	if (!host->pagesize_2k) {
241 		uint32_t config1 = readnfc(&host->regs->config1);
246 		writenfc(config1, &host->regs->config1);
249 	writenfc(NFC_OUTPUT, &host->regs->operation);
252 	wait_op_done(host, TROP_US_DELAY, spare_only);
263 			void __iomem *src = &host->regs->spare_area[i][0];
264 			void __iomem *dst = &host->regs->spare_area[0][i * 16];
272 static void send_read_id(struct mxc_nand_host *host)  argument
278 	writenfc(0x0, &host->regs->buf_addr);
280 	tmp = readnfc(&host->regs->config1);
282 	writenfc(tmp, &host->regs->config1);
286 	tmp = readnfc(&host->regs->config1);
288 	writenfc(tmp, &host->regs->config1);
290 	writenfc(NFC_ID, &host->regs->operation);
293 	wait_op_done(host, TROP_US_DELAY, 0);
300 static uint16_t get_dev_status(struct mxc_nand_host *host)  argument
303 	void __iomem *main_buf = host->regs->main_area[1];
313 	writenfc(1, &host->regs->buf_addr);
317 	tmp = readnfc(&host->regs->config1);
319 	writenfc(tmp, &host->regs->config1);
321 	writenfc(NFC_STATUS, &host->regs->operation);
324 	wait_op_done(host, TROP_US_DELAY, 0);
334 	ret = readnfc(&host->regs->config1) >> 16;
353 	struct mxc_nand_host *host = nand_get_controller_data(nand_chip);  local
355 	uint16_t tmp = readnfc(&host->regs->config1);
361 	writenfc(tmp, &host->regs->config1);
363 	uint32_t tmp = readnfc(&host->ip_regs->config2);
369 	writenfc(tmp, &host->ip_regs->config2);
387 	struct mxc_nand_host *host = nand_get_controller_data(chip);  local
406 		host->col_addr += chip->ecc.bytes;
429 		host->col_addr += chip->ecc.postpad + chip->ecc.prepad;
441 	struct mxc_nand_host *host = nand_get_controller_data(chip);  local
453 		host->col_addr = n * eccsize;
457 		host->col_addr = mtd->writesize + n * eccpitch;
486 	struct mxc_nand_host *host = nand_get_controller_data(chip);  local
501 		host->col_addr = n * eccsize;
505 		host->col_addr = mtd->writesize + n * eccpitch;
537 		host->col_addr = mtd->writesize +
550 	struct mxc_nand_host *host = nand_get_controller_data(chip);  local
563 		host->col_addr += chip->ecc.prepad + chip->ecc.postpad;
578 	struct mxc_nand_host *host = nand_get_controller_data(chip);  local
587 		host->col_addr = n * eccsize;
591 		host->col_addr = mtd->writesize + n * eccpitch;
598 		host->col_addr += eccbytes;
618 	struct mxc_nand_host *host = nand_get_controller_data(chip);  local
631 		host->col_addr = n * eccsize;
635 		host->col_addr = mtd->writesize + n * eccpitch;
662 	struct mxc_nand_host *host = nand_get_controller_data(nand_chip);  local
663 	uint32_t ecc_status = readl(&host->regs->ecc_status_result);
672 			if (last_bad != host->page_addr >> pg2blk_shift) {
673 				last_bad = host->page_addr >> pg2blk_shift;
677 				       last_bad, host->page_addr,
701 	struct mxc_nand_host *host = nand_get_controller_data(nand_chip);  local
708 	uint16_t ecc_status = readnfc(&host->regs->ecc_status_result);
729 	struct mxc_nand_host *host = nand_get_controller_data(nand_chip);  local
733 		(uint16_t __iomem *)host->regs->main_area[0];
735 		(uint16_t __iomem *)host->regs->spare_area[0];
742 	if (host->status_request)
743 		return get_dev_status(host) & 0xFF;
746 	col = host->col_addr >> 1;
749 	if (host->spare_only)
755 	ret = nfc_word.bytes[host->col_addr & 0x1];
759 		host->col_addr += 2;
761 		host->col_addr++;
769 	struct mxc_nand_host *host = nand_get_controller_data(nand_chip);  local
773 	pr_debug("mxc_nand_read_word(col = %d)\n", host->col_addr);
775 	col = host->col_addr;
777 	if (col < mtd->writesize && host->spare_only)
781 		p = (uint16_t __iomem *)(host->regs->main_area[0] +
784 		p = (uint16_t __iomem *)(host->regs->spare_area[0] +
806 	host->col_addr = col + 2;
820 	struct mxc_nand_host *host = nand_get_controller_data(nand_chip);  local
823 	pr_debug("mxc_nand_write_buf(col = %d, len = %d)\n", host->col_addr,
826 	col = host->col_addr;
829 	if (col < mtd->writesize && host->spare_only)
841 			p = host->regs->main_area[0] + (col & ~3);
843 			p = host->regs->spare_area[0] -
880 	host->col_addr = col;
891 	struct mxc_nand_host *host = nand_get_controller_data(nand_chip);  local
894 	pr_debug("mxc_nand_read_buf(col = %d, len = %d)\n", host->col_addr,
897 	col = host->col_addr;
900 	if (col < mtd->writesize && host->spare_only)
910 			p = host->regs->main_area[0] + (col & ~3);
912 			p = host->regs->spare_area[0] -
941 	host->col_addr = col;
951 	struct mxc_nand_host *host = nand_get_controller_data(nand_chip);  local
956 		if (host->clk_act)
957 			host->clk_act = 0;
961 		if (!host->clk_act)
962 			host->clk_act = 1;
978 	struct mxc_nand_host *host = nand_get_controller_data(nand_chip);  local
984 	host->status_request = false;
990 		host->col_addr = 0;
991 		host->status_request = true;
995 		host->page_addr = page_addr;
996 		host->col_addr = column;
997 		host->spare_only = false;
1001 		host->col_addr = column;
1002 		host->spare_only = true;
1003 		if (host->pagesize_2k)
1016 			if (host->pagesize_2k) {
1022 			host->col_addr = column - mtd->writesize;
1023 			host->spare_only = true;
1026 			if (!host->pagesize_2k)
1027 				send_cmd(host, NAND_CMD_READOOB);
1029 			host->spare_only = false;
1030 			host->col_addr = column;
1033 			if (!host->pagesize_2k)
1034 				send_cmd(host, NAND_CMD_READ0);
1039 		send_prog_page(host, 0, host->spare_only);
1041 		if (host->pagesize_2k && is_mxc_nfc_1()) {
1043 			send_prog_page(host, 1, host->spare_only);
1044 			send_prog_page(host, 2, host->spare_only);
1045 			send_prog_page(host, 3, host->spare_only);
1052 	send_cmd(host, command);
1062 		send_addr(host, 0);
1063 		if (host->pagesize_2k)
1065 			send_addr(host, 0);
1072 			send_addr(host, page_addr & 0xFF);
1086 		if (host->pagesize_2k) {
1088 			send_cmd(host, NAND_CMD_READSTART);
1090 			send_read_page(host, 0, host->spare_only);
1092 				send_read_page(host, 1, host->spare_only);
1093 				send_read_page(host, 2, host->spare_only);
1094 				send_read_page(host, 3, host->spare_only);
1097 			send_read_page(host, 0, host->spare_only);
1102 		host->col_addr = 0;
1103 		send_read_id(host);
1159 	host->nand = this;
1164 	nand_set_controller_data(this, host);
1173 	host->regs = (struct mxc_nand_regs __iomem *)CONFIG_MXC_NAND_REGS_BASE;
1175 	host->ip_regs =
1178 	host->clk_act = 1;
1203 	host->pagesize_2k = 0;
1220 	host->pagesize_2k = 1;
1223 	host->pagesize_2k = 0;
1229 	tmp = readnfc(&host->regs->config1);
1232 	writenfc(tmp, &host->regs->config1);
1233 	if (host->pagesize_2k)
1234 		writenfc(64/2, &host->regs->spare_area_size);
1236 		writenfc(16/2, &host->regs->spare_area_size);
1243 	writenfc(0x2, &host->regs->config);
1246 	writenfc(0x0, &host->regs->unlockstart_blkaddr);
1258 	writenfc(0xFFFF, &host->regs->unlockend_blkaddr);
1261 	writenfc(0x4, &host->regs->wrprot);
1263 	writenfc(NFC_V3_CONFIG1_RBA(0), &host->regs->config1);
1264 	writenfc(NFC_V3_IPC_CREQ, &host->ip_regs->ipc);
1268 			&host->ip_regs->wrprot);
1273 				&host->ip_regs->wrprot_unlock_blkaddr[tmp]);
1275 	writenfc(0, &host->ip_regs->ipc);
1277 	tmp = readnfc(&host->ip_regs->config2);
1282 	if (host->pagesize_2k) {
1290 	writenfc(tmp, &host->ip_regs->config2);
1301 	writenfc(tmp, &host->ip_regs->config3);
1303 	writenfc(0, &host->ip_regs->delay_line);