356 	dev_err(nfc->dev, "wait for empty cmd FIFO timedout\n");  in sunxi_nfc_wait_cmd_fifo_empty()
375 	dev_err(nfc->dev, "wait for NAND controller reset timedout\n");  in sunxi_nfc_rst()
410 		dev_err(nfc->dev, "cannot check R/B NAND status!\n");  in sunxi_nfc_dev_ready()
1293 		dev_err(nfc->dev, "unsupported tWB\n");  in sunxi_nand_chip_set_timings()
1299 		dev_err(nfc->dev, "unsupported tADL\n");  in sunxi_nand_chip_set_timings()
1305 		dev_err(nfc->dev, "unsupported tWHR\n");  in sunxi_nand_chip_set_timings()
1312 		dev_err(nfc->dev, "unsupported tRHW\n");  in sunxi_nand_chip_set_timings()
1420 		dev_err(nfc->dev, "unsupported strength\n");  in sunxi_nand_hw_common_ecc_ctrl_init()
1616 		dev_err(dev, "invalid reg property size\n");  in sunxi_nand_chip_init()
1624 		dev_err(dev, "could not allocate chip\n");  in sunxi_nand_chip_init()
1638 		dev_err(dev, "could not retrieve reg property: %d\n", ret);  in sunxi_nand_chip_init()
1645 		dev_err(dev, "could not retrieve reg property: %d\n", ret);  in sunxi_nand_chip_init()
1653 			dev_err(dev,  in sunxi_nand_chip_init()
1660 			dev_err(dev, "CS %d already assigned\n", tmp);  in sunxi_nand_chip_init()
1685 		dev_err(dev,  in sunxi_nand_chip_init()
1693 		dev_err(dev, "could not configure chip timings: %d\n", ret);  in sunxi_nand_chip_init()
1728 		dev_err(dev, "could not configure chip timings: %d\n", ret);  in sunxi_nand_chip_init()
1734 		dev_err(dev, "ECC init failed: %d\n", ret);  in sunxi_nand_chip_init()
1740 		dev_err(dev, "nand_scan_tail failed: %d\n", ret);  in sunxi_nand_chip_init()
1746 		dev_err(dev, "failed to register mtd device: %d\n", ret);  in sunxi_nand_chip_init()
1766 		dev_err(dev, "too many NAND chips: %d (max = 8)\n", i);  in sunxi_nand_chips_init()
1838 		dev_err(dev, "failed to init nand chips\n");  in sunxi_nand_init()