269 	struct eqos_mac_regs *mac_regs;  member
363 	return wait_for_bit_le32(&eqos->mac_regs->mdio_address,  in eqos_mdio_wait_idle()
384 	val = readl(&eqos->mac_regs->mdio_address);  in eqos_mdio_read()
394 	writel(val, &eqos->mac_regs->mdio_address);  in eqos_mdio_read()
404 	val = readl(&eqos->mac_regs->mdio_data);  in eqos_mdio_read()
428 	writel(mdio_val, &eqos->mac_regs->mdio_data);  in eqos_mdio_write()
430 	val = readl(&eqos->mac_regs->mdio_address);  in eqos_mdio_write()
440 	writel(val, &eqos->mac_regs->mdio_address);  in eqos_mdio_write()
641 	setbits_le32(&eqos->mac_regs->configuration, EQOS_MAC_CONFIGURATION_DM);  in eqos_set_full_duplex()
652 	clrbits_le32(&eqos->mac_regs->configuration, EQOS_MAC_CONFIGURATION_DM);  in eqos_set_half_duplex()
667 	clrbits_le32(&eqos->mac_regs->configuration,  in eqos_set_gmii_speed()
679 	setbits_le32(&eqos->mac_regs->configuration,  in eqos_set_mii_speed_100()
691 	clrsetbits_le32(&eqos->mac_regs->configuration,  in eqos_set_mii_speed_10()
826 	writel(val, &eqos->mac_regs->address0_high);  in eqos_write_hwaddr()
831 	writel(val, &eqos->mac_regs->address0_low);  in eqos_write_hwaddr()
880 	writel(val, &eqos->mac_regs->us_tic_counter);  in eqos_start()
926 	val = readl(&eqos->mac_regs->hw_feature1);  in eqos_start()
993 	clrsetbits_le32(&eqos->mac_regs->rxq_ctrl0,  in eqos_start()
1001 	setbits_le32(&eqos->mac_regs->q0_tx_flow_ctrl,  in eqos_start()
1004 	clrbits_le32(&eqos->mac_regs->txq_prty_map0,  in eqos_start()
1008 	clrbits_le32(&eqos->mac_regs->rxq_ctrl2,  in eqos_start()
1012 	setbits_le32(&eqos->mac_regs->q0_tx_flow_ctrl,  in eqos_start()
1014 	setbits_le32(&eqos->mac_regs->rx_flow_ctrl,  in eqos_start()
1017 	clrsetbits_le32(&eqos->mac_regs->configuration,  in eqos_start()
1091 	setbits_le32(&eqos->mac_regs->configuration,  in eqos_start()
1153 	clrbits_le32(&eqos->mac_regs->configuration,  in eqos_stop()
1460 	eqos->mac_regs = (void *)(eqos->regs + EQOS_MAC_REGS_BASE);  in eqos_probe()