25 static void pch_gbe_mac_read(struct pch_gbe_regs *mac_regs, u8 *addr)  in pch_gbe_mac_read()  argument
29 	macid_hi = readl(&mac_regs->mac_adr[0].high);  in pch_gbe_mac_read()
30 	macid_lo = readl(&mac_regs->mac_adr[0].low) & 0xffff;  in pch_gbe_mac_read()
41 static int pch_gbe_mac_write(struct pch_gbe_regs *mac_regs, u8 *addr)  in pch_gbe_mac_write()  argument
49 	writel(macid_hi, &mac_regs->mac_adr[0].high);  in pch_gbe_mac_write()
50 	writel(macid_lo, &mac_regs->mac_adr[0].low);  in pch_gbe_mac_write()
51 	writel(0xfffe, &mac_regs->addr_mask);  in pch_gbe_mac_write()
55 		if (!(readl(&mac_regs->addr_mask) & PCH_GBE_BUSY))  in pch_gbe_mac_write()
68 	struct pch_gbe_regs *mac_regs = priv->mac_regs;  in pch_gbe_reset()  local
74 	writel(PCH_GBE_ALL_RST, &mac_regs->reset);  in pch_gbe_reset()
90 	       &mac_regs->rgmii_ctrl);  in pch_gbe_reset()
94 		if (!(readl(&mac_regs->reset) & PCH_GBE_ALL_RST)) {  in pch_gbe_reset()
100 			return pch_gbe_mac_write(mac_regs, plat->enetaddr);  in pch_gbe_reset()
113 	struct pch_gbe_regs *mac_regs = priv->mac_regs;  in pch_gbe_rx_descs_init()  local
125 	       &mac_regs->rx_dsc_base);  in pch_gbe_rx_descs_init()
127 	       &mac_regs->rx_dsc_size);  in pch_gbe_rx_descs_init()
130 	       &mac_regs->rx_dsc_sw_p);  in pch_gbe_rx_descs_init()
136 	struct pch_gbe_regs *mac_regs = priv->mac_regs;  in pch_gbe_tx_descs_init()  local
144 	       &mac_regs->tx_dsc_base);  in pch_gbe_tx_descs_init()
146 	       &mac_regs->tx_dsc_size);  in pch_gbe_tx_descs_init()
148 	       &mac_regs->tx_dsc_sw_p);  in pch_gbe_tx_descs_init()
151 static void pch_gbe_adjust_link(struct pch_gbe_regs *mac_regs,  in pch_gbe_adjust_link()  argument
159 	clrbits_le32(&mac_regs->rgmii_ctrl,  in pch_gbe_adjust_link()
161 	clrbits_le32(&mac_regs->mode,  in pch_gbe_adjust_link()
166 		setbits_le32(&mac_regs->rgmii_ctrl, PCH_GBE_RGMII_RATE_125M);  in pch_gbe_adjust_link()
167 		setbits_le32(&mac_regs->mode, PCH_GBE_MODE_GMII_ETHER);  in pch_gbe_adjust_link()
170 		setbits_le32(&mac_regs->rgmii_ctrl, PCH_GBE_RGMII_RATE_25M);  in pch_gbe_adjust_link()
171 		setbits_le32(&mac_regs->mode, PCH_GBE_MODE_MII_ETHER);  in pch_gbe_adjust_link()
174 		setbits_le32(&mac_regs->rgmii_ctrl, PCH_GBE_RGMII_RATE_2_5M);  in pch_gbe_adjust_link()
175 		setbits_le32(&mac_regs->mode, PCH_GBE_MODE_MII_ETHER);  in pch_gbe_adjust_link()
180 		setbits_le32(&mac_regs->rgmii_ctrl, PCH_GBE_CRS_SEL);  in pch_gbe_adjust_link()
181 		setbits_le32(&mac_regs->mode, PCH_GBE_MODE_FULL_DUPLEX);  in pch_gbe_adjust_link()
193 	struct pch_gbe_regs *mac_regs = priv->mac_regs;  in pch_gbe_start()  local
202 	writel(PCH_GBE_MODE_FR_BST, &mac_regs->mode);  in pch_gbe_start()
204 	writel(PCH_GBE_RX_TCPIPACC_OFF, &mac_regs->tcpip_acc);  in pch_gbe_start()
206 	writel(0, &mac_regs->rx_fctrl);  in pch_gbe_start()
209 	       PCH_GBE_RH_RD_TRG_32, &mac_regs->rx_mode);  in pch_gbe_start()
212 	       PCH_GBE_TM_SHORT_PKT, &mac_regs->tx_mode);  in pch_gbe_start()
221 	pch_gbe_adjust_link(mac_regs, priv->phydev);  in pch_gbe_start()
227 	writel(PCH_GBE_RX_DMA_EN | PCH_GBE_TX_DMA_EN, &mac_regs->dma_ctrl);  in pch_gbe_start()
228 	writel(PCH_GBE_MRE_MAC_RX_EN, &mac_regs->mac_rx_en);  in pch_gbe_start()
245 	struct pch_gbe_regs *mac_regs = priv->mac_regs;  in pch_gbe_send()  local
273 	       &mac_regs->tx_dsc_sw_p);  in pch_gbe_send()
277 		int_st = readl(&mac_regs->int_st);  in pch_gbe_send()
291 	struct pch_gbe_regs *mac_regs = priv->mac_regs;  in pch_gbe_recv()  local
298 	readl(&mac_regs->int_st);  in pch_gbe_recv()
299 	hw_desc = readl(&mac_regs->rx_dsc_hw_p_hld);  in pch_gbe_recv()
319 	struct pch_gbe_regs *mac_regs = priv->mac_regs;  in pch_gbe_free_pkt()  local
331 	       &mac_regs->rx_dsc_sw_p);  in pch_gbe_free_pkt()
336 static int pch_gbe_mdio_ready(struct pch_gbe_regs *mac_regs)  in pch_gbe_mdio_ready()  argument
341 		if (readl(&mac_regs->miim) & PCH_GBE_MIIM_OPER_READY)  in pch_gbe_mdio_ready()
352 	struct pch_gbe_regs *mac_regs = bus->priv;  in pch_gbe_mdio_read()  local
355 	if (pch_gbe_mdio_ready(mac_regs))  in pch_gbe_mdio_read()
361 	writel(miim, &mac_regs->miim);  in pch_gbe_mdio_read()
363 	if (pch_gbe_mdio_ready(mac_regs))  in pch_gbe_mdio_read()
366 	return readl(&mac_regs->miim) & 0xffff;  in pch_gbe_mdio_read()
372 	struct pch_gbe_regs *mac_regs = bus->priv;  in pch_gbe_mdio_write()  local
375 	if (pch_gbe_mdio_ready(mac_regs))  in pch_gbe_mdio_write()
381 	writel(miim, &mac_regs->miim);  in pch_gbe_mdio_write()
383 	if (pch_gbe_mdio_ready(mac_regs))  in pch_gbe_mdio_write()
389 static int pch_gbe_mdio_init(const char *name, struct pch_gbe_regs *mac_regs)  in pch_gbe_mdio_init()  argument
403 	bus->priv = (void *)mac_regs;  in pch_gbe_mdio_init()
451 	priv->mac_regs = (struct pch_gbe_regs *)iobase;  in pch_gbe_probe()
454 	pch_gbe_mac_read(priv->mac_regs, plat->enetaddr);  in pch_gbe_probe()
457 	pch_gbe_mdio_init(dev->name, priv->mac_regs);  in pch_gbe_probe()