88 	struct axidma_reg *dmatx;  member
359 	temp = readl(&priv->dmatx->control);  in axiemac_stop()
361 	writel(temp, &priv->dmatx->control);  in axiemac_stop()
442 	writel(XAXIDMA_CR_RESET_MASK, &priv->dmatx->control);  in axi_dma_init()
449 		if (!((readl(&priv->dmatx->control) |  in axi_dma_init()
544 	if (readl(&priv->dmatx->status) & XAXIDMA_HALTED_MASK) {  in axiemac_send()
546 		axienet_dma_write(&tx_bd, &priv->dmatx->current);  in axiemac_send()
548 		temp = readl(&priv->dmatx->control);  in axiemac_send()
550 		writel(temp, &priv->dmatx->control);  in axiemac_send()
554 	axienet_dma_write(&tx_bd, &priv->dmatx->tail);  in axiemac_send()
559 	while (timeout && (!(readl(&priv->dmatx->status) &  in axiemac_send()
727 	priv->dmatx = (struct axidma_reg *)fdtdec_get_addr(gd->fdt_blob,  in axi_emac_ofdata_to_platdata()
729 	if (!priv->dmatx) {  in axi_emac_ofdata_to_platdata()
734 	priv->dmarx = (struct axidma_reg *)((u32)priv->dmatx + 0x30);  in axi_emac_ofdata_to_platdata()