435 	struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;  in imx6_pcie_assert_core_reset()  local
438 		setbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_PCIE_SW_RST);  in imx6_pcie_assert_core_reset()
444 	setbits_le32(&iomuxc_regs->gpr[12], IOMUXC_GPR12_TEST_POWERDOWN);  in imx6_pcie_assert_core_reset()
446 	setbits_le32(&iomuxc_regs->gpr[5], IOMUXC_GPR5_PCIE_BTNRST);  in imx6_pcie_assert_core_reset()
464 		gpr1 = readl(&iomuxc_regs->gpr[1]);  in imx6_pcie_assert_core_reset()
465 		gpr12 = readl(&iomuxc_regs->gpr[12]);  in imx6_pcie_assert_core_reset()
477 			writel(val, &iomuxc_regs->gpr[12]);  in imx6_pcie_assert_core_reset()
480 	setbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_TEST_POWERDOWN);  in imx6_pcie_assert_core_reset()
481 	clrbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_REF_SSP_EN);  in imx6_pcie_assert_core_reset()
489 	struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;  in imx6_pcie_init_phy()  local
491 	clrbits_le32(&iomuxc_regs->gpr[12], IOMUXC_GPR12_APPS_LTSSM_ENABLE);  in imx6_pcie_init_phy()
493 	clrsetbits_le32(&iomuxc_regs->gpr[12],  in imx6_pcie_init_phy()
496 	clrsetbits_le32(&iomuxc_regs->gpr[12],  in imx6_pcie_init_phy()
501 	clrsetbits_le32(&iomuxc_regs->gpr[12],  in imx6_pcie_init_phy()
511 	       &iomuxc_regs->gpr[8]);  in imx6_pcie_init_phy()
574 	struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;  in imx6_pcie_deassert_core_reset()  local
581 		clrbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_PCIE_SW_RST);  in imx6_pcie_deassert_core_reset()
591 	clrbits_le32(&iomuxc_regs->gpr[12], IOMUXC_GPR12_TEST_POWERDOWN);  in imx6_pcie_deassert_core_reset()
593 	clrbits_le32(&iomuxc_regs->gpr[5], IOMUXC_GPR5_PCIE_BTNRST);  in imx6_pcie_deassert_core_reset()
596 	clrbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_TEST_POWERDOWN);  in imx6_pcie_deassert_core_reset()
597 	setbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_REF_SSP_EN);  in imx6_pcie_deassert_core_reset()
607 	struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;  in imx_pcie_link_up()  local
640 	setbits_le32(&iomuxc_regs->gpr[12], IOMUXC_GPR12_APPS_LTSSM_ENABLE);  in imx_pcie_link_up()