Lines Matching refs:ds
138 static inline u32 davinci_spi_xfer_data(struct davinci_spi_slave *ds, u32 data) in davinci_spi_xfer_data() argument
143 writel(data, &ds->regs->dat1); in davinci_spi_xfer_data()
146 while ((buf_reg_val = readl(&ds->regs->buf)) & SPIBUF_RXEMPTY_MASK) in davinci_spi_xfer_data()
152 static int davinci_spi_read(struct davinci_spi_slave *ds, unsigned int len, in davinci_spi_read() argument
159 (ds->cur_cs << SPIDAT1_CSNR_SHIFT)); in davinci_spi_read()
162 while (readl(&ds->regs->buf) & SPIBUF_TXFULL_MASK) in davinci_spi_read()
166 writel(data1_reg_val, &ds->regs->dat1); in davinci_spi_read()
170 *rxp++ = davinci_spi_xfer_data(ds, data1_reg_val); in davinci_spi_read()
177 *rxp = davinci_spi_xfer_data(ds, data1_reg_val); in davinci_spi_read()
182 static int davinci_spi_write(struct davinci_spi_slave *ds, unsigned int len, in davinci_spi_write() argument
189 (ds->cur_cs << SPIDAT1_CSNR_SHIFT)); in davinci_spi_write()
192 while (readl(&ds->regs->buf) & SPIBUF_TXFULL_MASK) in davinci_spi_write()
197 writel(data1_reg_val | *txp++, &ds->regs->dat1); in davinci_spi_write()
203 davinci_spi_xfer_data(ds, data1_reg_val | *txp++); in davinci_spi_write()
210 davinci_spi_xfer_data(ds, data1_reg_val | *txp); in davinci_spi_write()
215 static int davinci_spi_read_write(struct davinci_spi_slave *ds, unsigned in davinci_spi_read_write() argument
223 (ds->cur_cs << SPIDAT1_CSNR_SHIFT)); in davinci_spi_read_write()
226 while (readl(&ds->regs->buf) & SPIBUF_TXFULL_MASK) in davinci_spi_read_write()
231 *rxp++ = davinci_spi_xfer_data(ds, data1_reg_val | *txp++); in davinci_spi_read_write()
238 *rxp = davinci_spi_xfer_data(ds, data1_reg_val | *txp); in davinci_spi_read_write()
244 static int __davinci_spi_claim_bus(struct davinci_spi_slave *ds, int cs) in __davinci_spi_claim_bus() argument
249 writel(SPIGCR0_SPIRST_MASK, &ds->regs->gcr0); in __davinci_spi_claim_bus()
251 writel(SPIGCR0_SPIENA_MASK, &ds->regs->gcr0); in __davinci_spi_claim_bus()
254 writel(SPIGCR1_MASTER_MASK | SPIGCR1_CLKMOD_MASK, &ds->regs->gcr1); in __davinci_spi_claim_bus()
258 SPIPC0_DOFUN_MASK | SPIPC0_DIFUN_MASK), &ds->regs->pc0); in __davinci_spi_claim_bus()
261 scalar = ((CONFIG_SYS_SPI_CLK / ds->freq) - 1) & 0xFF; in __davinci_spi_claim_bus()
268 if (ds->mode & SPI_CPOL) in __davinci_spi_claim_bus()
270 if (!(ds->mode & SPI_CPHA)) in __davinci_spi_claim_bus()
273 (mode << SPIFMT_PHASE_SHIFT), &ds->regs->fmt0); in __davinci_spi_claim_bus()
280 (50 << SPI_T2CDELAY_SHIFT), &ds->regs->delay); in __davinci_spi_claim_bus()
283 writel(SPIDEF_CSDEF0_MASK, &ds->regs->def); in __davinci_spi_claim_bus()
286 writel(0, &ds->regs->int0); in __davinci_spi_claim_bus()
287 writel(0, &ds->regs->lvl); in __davinci_spi_claim_bus()
290 writel((readl(&ds->regs->gcr1) | SPIGCR1_SPIENA_MASK), &ds->regs->gcr1); in __davinci_spi_claim_bus()
295 static int __davinci_spi_release_bus(struct davinci_spi_slave *ds) in __davinci_spi_release_bus() argument
298 writel(SPIGCR0_SPIRST_MASK, &ds->regs->gcr0); in __davinci_spi_release_bus()
303 static int __davinci_spi_xfer(struct davinci_spi_slave *ds, in __davinci_spi_xfer() argument
328 return davinci_spi_read(ds, len, din, flags); in __davinci_spi_xfer()
330 return davinci_spi_write(ds, len, dout, flags); in __davinci_spi_xfer()
331 if (!ds->half_duplex) in __davinci_spi_xfer()
332 return davinci_spi_read_write(ds, len, din, dout, flags); in __davinci_spi_xfer()
340 davinci_spi_write(ds, 1, &dummy, flags); in __davinci_spi_xfer()
398 struct davinci_spi_slave *ds; in spi_setup_slave() local
403 ds = spi_alloc_slave(struct davinci_spi_slave, bus, cs); in spi_setup_slave()
404 if (!ds) in spi_setup_slave()
409 ds->regs = (struct davinci_spi_regs *)SPI0_BASE; in spi_setup_slave()
413 ds->regs = (struct davinci_spi_regs *)SPI1_BASE; in spi_setup_slave()
418 ds->regs = (struct davinci_spi_regs *)SPI2_BASE; in spi_setup_slave()
425 ds->freq = max_hz; in spi_setup_slave()
426 ds->mode = mode; in spi_setup_slave()
428 return &ds->slave; in spi_setup_slave()
433 struct davinci_spi_slave *ds = to_davinci_spi(slave); in spi_free_slave() local
435 free(ds); in spi_free_slave()
441 struct davinci_spi_slave *ds = to_davinci_spi(slave); in spi_xfer() local
443 ds->cur_cs = slave->cs; in spi_xfer()
445 return __davinci_spi_xfer(ds, bitlen, dout, din, flags); in spi_xfer()
450 struct davinci_spi_slave *ds = to_davinci_spi(slave); in spi_claim_bus() local
453 ds->half_duplex = true; in spi_claim_bus()
455 ds->half_duplex = false; in spi_claim_bus()
457 return __davinci_spi_claim_bus(ds, ds->slave.cs); in spi_claim_bus()
462 struct davinci_spi_slave *ds = to_davinci_spi(slave); in spi_release_bus() local
464 __davinci_spi_release_bus(ds); in spi_release_bus()
470 struct davinci_spi_slave *ds = dev_get_priv(bus); in davinci_spi_set_speed() local
476 ds->freq = max_hz; in davinci_spi_set_speed()
483 struct davinci_spi_slave *ds = dev_get_priv(bus); in davinci_spi_set_mode() local
486 ds->mode = mode; in davinci_spi_set_mode()
496 struct davinci_spi_slave *ds = dev_get_priv(bus); in davinci_spi_claim_bus() local
498 if (slave_plat->cs >= ds->num_cs) { in davinci_spi_claim_bus()
502 ds->half_duplex = slave_plat->mode & SPI_PREAMBLE; in davinci_spi_claim_bus()
504 return __davinci_spi_claim_bus(ds, slave_plat->cs); in davinci_spi_claim_bus()
509 struct davinci_spi_slave *ds = dev_get_priv(dev->parent); in davinci_spi_release_bus() local
511 return __davinci_spi_release_bus(ds); in davinci_spi_release_bus()
521 struct davinci_spi_slave *ds = dev_get_priv(bus); in davinci_spi_xfer() local
523 if (slave->cs >= ds->num_cs) { in davinci_spi_xfer()
527 ds->cur_cs = slave->cs; in davinci_spi_xfer()
529 return __davinci_spi_xfer(ds, bitlen, dout, din, flags); in davinci_spi_xfer()
540 struct davinci_spi_slave *ds = dev_get_priv(bus); in davinci_ofdata_to_platadata() local
544 ds->regs = devfdt_map_physmem(bus, sizeof(struct davinci_spi_regs)); in davinci_ofdata_to_platadata()
545 if (!ds->regs) { in davinci_ofdata_to_platadata()
549 ds->num_cs = fdtdec_get_int(blob, node, "num-cs", 4); in davinci_ofdata_to_platadata()