100 	u32 flags;  member
126 	u32 flags;  member
146 static u32 qspi_read32(u32 flags, u32 *addr)  in qspi_read32()  argument
148 	return flags & QSPI_FLAG_REGMAP_ENDIAN_BIG ?  in qspi_read32()
152 static void qspi_write32(u32 flags, u32 *addr, u32 val)  in qspi_write32()  argument
154 	flags & QSPI_FLAG_REGMAP_ENDIAN_BIG ?  in qspi_write32()
166 		val = qspi_read32(priv->flags, &priv->regs->sr);  in is_controller_busy()
194 	qspi_write32(priv->flags, &regs->lutkey, LUT_KEY_VALUE);  in qspi_set_lut()
195 	qspi_write32(priv->flags, &regs->lckcr, QSPI_LCKCR_UNLOCK);  in qspi_set_lut()
199 	qspi_write32(priv->flags, &regs->lut[lut_base], OPRND0(QSPI_CMD_WREN) |  in qspi_set_lut()
201 	qspi_write32(priv->flags, &regs->lut[lut_base + 1], 0);  in qspi_set_lut()
202 	qspi_write32(priv->flags, &regs->lut[lut_base + 2], 0);  in qspi_set_lut()
203 	qspi_write32(priv->flags, &regs->lut[lut_base + 3], 0);  in qspi_set_lut()
208 	qspi_write32(priv->flags, &regs->lut[lut_base],  in qspi_set_lut()
214 		qspi_write32(priv->flags, &regs->lut[lut_base],  in qspi_set_lut()
219 		qspi_write32(priv->flags, &regs->lut[lut_base],  in qspi_set_lut()
225 	qspi_write32(priv->flags, &regs->lut[lut_base + 1],  in qspi_set_lut()
229 	qspi_write32(priv->flags, &regs->lut[lut_base + 2], 0);  in qspi_set_lut()
230 	qspi_write32(priv->flags, &regs->lut[lut_base + 3], 0);  in qspi_set_lut()
234 	qspi_write32(priv->flags, &regs->lut[lut_base], OPRND0(QSPI_CMD_RDSR) |  in qspi_set_lut()
237 	qspi_write32(priv->flags, &regs->lut[lut_base + 1], 0);  in qspi_set_lut()
238 	qspi_write32(priv->flags, &regs->lut[lut_base + 2], 0);  in qspi_set_lut()
239 	qspi_write32(priv->flags, &regs->lut[lut_base + 3], 0);  in qspi_set_lut()
244 	qspi_write32(priv->flags, &regs->lut[lut_base], OPRND0(QSPI_CMD_SE) |  in qspi_set_lut()
249 		qspi_write32(priv->flags, &regs->lut[lut_base],  in qspi_set_lut()
254 		qspi_write32(priv->flags, &regs->lut[lut_base],  in qspi_set_lut()
259 	qspi_write32(priv->flags, &regs->lut[lut_base + 1], 0);  in qspi_set_lut()
260 	qspi_write32(priv->flags, &regs->lut[lut_base + 2], 0);  in qspi_set_lut()
261 	qspi_write32(priv->flags, &regs->lut[lut_base + 3], 0);  in qspi_set_lut()
265 	qspi_write32(priv->flags, &regs->lut[lut_base],  in qspi_set_lut()
268 	qspi_write32(priv->flags, &regs->lut[lut_base + 1], 0);  in qspi_set_lut()
269 	qspi_write32(priv->flags, &regs->lut[lut_base + 2], 0);  in qspi_set_lut()
270 	qspi_write32(priv->flags, &regs->lut[lut_base + 3], 0);  in qspi_set_lut()
275 	qspi_write32(priv->flags, &regs->lut[lut_base], OPRND0(QSPI_CMD_PP) |  in qspi_set_lut()
280 		qspi_write32(priv->flags, &regs->lut[lut_base],  in qspi_set_lut()
285 		qspi_write32(priv->flags, &regs->lut[lut_base],  in qspi_set_lut()
296 	qspi_write32(priv->flags, &regs->lut[lut_base + 1], OPRND0(0) |  in qspi_set_lut()
299 	qspi_write32(priv->flags, &regs->lut[lut_base + 1],  in qspi_set_lut()
303 	qspi_write32(priv->flags, &regs->lut[lut_base + 2], 0);  in qspi_set_lut()
304 	qspi_write32(priv->flags, &regs->lut[lut_base + 3], 0);  in qspi_set_lut()
308 	qspi_write32(priv->flags, &regs->lut[lut_base], OPRND0(QSPI_CMD_RDID) |  in qspi_set_lut()
311 	qspi_write32(priv->flags, &regs->lut[lut_base + 1], 0);  in qspi_set_lut()
312 	qspi_write32(priv->flags, &regs->lut[lut_base + 2], 0);  in qspi_set_lut()
313 	qspi_write32(priv->flags, &regs->lut[lut_base + 3], 0);  in qspi_set_lut()
317 	qspi_write32(priv->flags, &regs->lut[lut_base], OPRND0(QSPI_CMD_BE_4K) |  in qspi_set_lut()
328 	qspi_write32(priv->flags, &regs->lut[lut_base], OPRND0(QSPI_CMD_BRRD) |  in qspi_set_lut()
333 	qspi_write32(priv->flags, &regs->lut[lut_base], OPRND0(QSPI_CMD_BRWR) |  in qspi_set_lut()
338 	qspi_write32(priv->flags, &regs->lut[lut_base], OPRND0(QSPI_CMD_RDEAR) |  in qspi_set_lut()
343 	qspi_write32(priv->flags, &regs->lut[lut_base], OPRND0(QSPI_CMD_WREAR) |  in qspi_set_lut()
353 	qspi_write32(priv->flags, &regs->lut[lut_base],  in qspi_set_lut()
357 	qspi_write32(priv->flags, &regs->lut[lut_base + 1],  in qspi_set_lut()
367 	qspi_write32(priv->flags, &regs->lut[lut_base],  in qspi_set_lut()
371 	qspi_write32(priv->flags, &regs->lut[lut_base + 1],  in qspi_set_lut()
375 	qspi_write32(priv->flags, &regs->lutkey, LUT_KEY_VALUE);  in qspi_set_lut()
376 	qspi_write32(priv->flags, &regs->lckcr, QSPI_LCKCR_LOCK);  in qspi_set_lut()
391 	reg = qspi_read32(priv->flags, &regs->mcr);  in qspi_ahb_invalid()
393 	qspi_write32(priv->flags, &regs->mcr, reg);  in qspi_ahb_invalid()
402 	qspi_write32(priv->flags, &regs->mcr, reg);  in qspi_ahb_invalid()
412 	mcr_reg = qspi_read32(priv->flags, &regs->mcr);  in qspi_ahb_read()
414 	qspi_write32(priv->flags, &regs->mcr,  in qspi_ahb_read()
422 	qspi_write32(priv->flags, &regs->mcr, mcr_reg);  in qspi_ahb_read()
430 	reg = qspi_read32(priv->flags, &regs->mcr);  in qspi_enable_ddr_mode()
432 	qspi_write32(priv->flags, &regs->mcr, reg | QSPI_MCR_MDIS_MASK);  in qspi_enable_ddr_mode()
435 	reg2 = qspi_read32(priv->flags, &regs->smpr);  in qspi_enable_ddr_mode()
438 	qspi_write32(priv->flags, &regs->smpr, reg2);  in qspi_enable_ddr_mode()
445 	qspi_write32(priv->flags, &regs->mcr, reg);  in qspi_enable_ddr_mode()
466 	qspi_write32(priv->flags, &regs->buf0cr, QSPI_BUFXCR_INVALID_MSTRID);  in qspi_init_ahb_read()
467 	qspi_write32(priv->flags, &regs->buf1cr, QSPI_BUFXCR_INVALID_MSTRID);  in qspi_init_ahb_read()
468 	qspi_write32(priv->flags, &regs->buf2cr, QSPI_BUFXCR_INVALID_MSTRID);  in qspi_init_ahb_read()
469 	qspi_write32(priv->flags, &regs->buf3cr, QSPI_BUF3CR_ALLMST_MASK |  in qspi_init_ahb_read()
473 	qspi_write32(priv->flags, &regs->buf0ind, 0);  in qspi_init_ahb_read()
474 	qspi_write32(priv->flags, &regs->buf1ind, 0);  in qspi_init_ahb_read()
475 	qspi_write32(priv->flags, &regs->buf2ind, 0);  in qspi_init_ahb_read()
481 	qspi_write32(priv->flags, &regs->bfgencr,  in qspi_init_ahb_read()
496 	mcr_reg = qspi_read32(priv->flags, &regs->mcr);  in qspi_op_rdbank()
497 	qspi_write32(priv->flags, &regs->mcr,  in qspi_op_rdbank()
500 	qspi_write32(priv->flags, &regs->rbct, QSPI_RBCT_RXBRD_USEIPS);  in qspi_op_rdbank()
502 	qspi_write32(priv->flags, &regs->sfar, priv->cur_amba_base);  in qspi_op_rdbank()
509 	qspi_write32(priv->flags, &regs->ipcr,  in qspi_op_rdbank()
513 	while (qspi_read32(priv->flags, &regs->sr) & QSPI_SR_BUSY_MASK)  in qspi_op_rdbank()
519 		reg = qspi_read32(priv->flags, &regs->rbsr);  in qspi_op_rdbank()
521 			data = qspi_read32(priv->flags, &regs->rbdr[0]);  in qspi_op_rdbank()
524 			qspi_write32(priv->flags, &regs->mcr,  in qspi_op_rdbank()
525 				     qspi_read32(priv->flags, &regs->mcr) |  in qspi_op_rdbank()
531 	qspi_write32(priv->flags, &regs->mcr, mcr_reg);  in qspi_op_rdbank()
541 	mcr_reg = qspi_read32(priv->flags, &regs->mcr);  in qspi_op_rdid()
542 	qspi_write32(priv->flags, &regs->mcr,  in qspi_op_rdid()
545 	qspi_write32(priv->flags, &regs->rbct, QSPI_RBCT_RXBRD_USEIPS);  in qspi_op_rdid()
547 	qspi_write32(priv->flags, &regs->sfar, priv->cur_amba_base);  in qspi_op_rdid()
549 	qspi_write32(priv->flags, &regs->ipcr,  in qspi_op_rdid()
551 	while (qspi_read32(priv->flags, &regs->sr) & QSPI_SR_BUSY_MASK)  in qspi_op_rdid()
558 		rbsr_reg = qspi_read32(priv->flags, &regs->rbsr);  in qspi_op_rdid()
560 			data = qspi_read32(priv->flags, &regs->rbdr[i]);  in qspi_op_rdid()
570 	qspi_write32(priv->flags, &regs->mcr, mcr_reg);  in qspi_op_rdid()
587 	mcr_reg = qspi_read32(priv->flags, &regs->mcr);  in qspi_op_read()
588 	qspi_write32(priv->flags, &regs->mcr,  in qspi_op_read()
591 	qspi_write32(priv->flags, &regs->rbct, QSPI_RBCT_RXBRD_USEIPS);  in qspi_op_read()
598 		qspi_write32(priv->flags, &regs->sfar, to_or_from);  in qspi_op_read()
603 		qspi_write32(priv->flags, &regs->ipcr,  in qspi_op_read()
606 		while (qspi_read32(priv->flags, &regs->sr) & QSPI_SR_BUSY_MASK)  in qspi_op_read()
614 			data = qspi_read32(priv->flags, &regs->rbdr[i]);  in qspi_op_read()
624 		qspi_write32(priv->flags, &regs->mcr,  in qspi_op_read()
625 			     qspi_read32(priv->flags, &regs->mcr) |  in qspi_op_read()
629 	qspi_write32(priv->flags, &regs->mcr, mcr_reg);  in qspi_op_read()
639 	mcr_reg = qspi_read32(priv->flags, &regs->mcr);  in qspi_op_write()
640 	qspi_write32(priv->flags, &regs->mcr,  in qspi_op_write()
643 	qspi_write32(priv->flags, &regs->rbct, QSPI_RBCT_RXBRD_USEIPS);  in qspi_op_write()
649 		qspi_write32(priv->flags, &regs->ipcr,  in qspi_op_write()
651 		while (qspi_read32(priv->flags, &regs->sr) & QSPI_SR_BUSY_MASK)  in qspi_op_write()
654 		qspi_write32(priv->flags, &regs->ipcr,  in qspi_op_write()
656 		while (qspi_read32(priv->flags, &regs->sr) & QSPI_SR_BUSY_MASK)  in qspi_op_write()
659 		reg = qspi_read32(priv->flags, &regs->rbsr);  in qspi_op_write()
661 			status_reg = qspi_read32(priv->flags, &regs->rbdr[0]);  in qspi_op_write()
664 		qspi_write32(priv->flags, &regs->mcr,  in qspi_op_write()
665 			     qspi_read32(priv->flags, &regs->mcr) |  in qspi_op_write()
682 	qspi_write32(priv->flags, &regs->sfar, to_or_from);  in qspi_op_write()
697 		qspi_write32(priv->flags, &regs->tbdr, data);  in qspi_op_write()
701 	qspi_write32(priv->flags, &regs->ipcr,  in qspi_op_write()
703 	while (qspi_read32(priv->flags, &regs->sr) & QSPI_SR_BUSY_MASK)  in qspi_op_write()
706 	qspi_write32(priv->flags, &regs->mcr, mcr_reg);  in qspi_op_write()
714 	mcr_reg = qspi_read32(priv->flags, &regs->mcr);  in qspi_op_rdsr()
715 	qspi_write32(priv->flags, &regs->mcr,  in qspi_op_rdsr()
718 	qspi_write32(priv->flags, &regs->rbct, QSPI_RBCT_RXBRD_USEIPS);  in qspi_op_rdsr()
720 	qspi_write32(priv->flags, &regs->sfar, priv->cur_amba_base);  in qspi_op_rdsr()
722 	qspi_write32(priv->flags, &regs->ipcr,  in qspi_op_rdsr()
724 	while (qspi_read32(priv->flags, &regs->sr) & QSPI_SR_BUSY_MASK)  in qspi_op_rdsr()
730 		reg = qspi_read32(priv->flags, &regs->rbsr);  in qspi_op_rdsr()
732 			data = qspi_read32(priv->flags, &regs->rbdr[0]);  in qspi_op_rdsr()
735 			qspi_write32(priv->flags, &regs->mcr,  in qspi_op_rdsr()
736 				     qspi_read32(priv->flags, &regs->mcr) |  in qspi_op_rdsr()
742 	qspi_write32(priv->flags, &regs->mcr, mcr_reg);  in qspi_op_rdsr()
751 	mcr_reg = qspi_read32(priv->flags, &regs->mcr);  in qspi_op_erase()
752 	qspi_write32(priv->flags, &regs->mcr,  in qspi_op_erase()
755 	qspi_write32(priv->flags, &regs->rbct, QSPI_RBCT_RXBRD_USEIPS);  in qspi_op_erase()
758 	qspi_write32(priv->flags, &regs->sfar, to_or_from);  in qspi_op_erase()
760 	qspi_write32(priv->flags, &regs->ipcr,  in qspi_op_erase()
762 	while (qspi_read32(priv->flags, &regs->sr) & QSPI_SR_BUSY_MASK)  in qspi_op_erase()
766 		qspi_write32(priv->flags, &regs->ipcr,  in qspi_op_erase()
769 		qspi_write32(priv->flags, &regs->ipcr,  in qspi_op_erase()
772 	while (qspi_read32(priv->flags, &regs->sr) & QSPI_SR_BUSY_MASK)  in qspi_op_erase()
775 	qspi_write32(priv->flags, &regs->mcr, mcr_reg);  in qspi_op_erase()
779 		const void *dout, void *din, unsigned long flags)  in qspi_xfer()  argument
788 		if (flags & SPI_XFER_BEGIN) {  in qspi_xfer()
793 		if (flags == SPI_XFER_END) {  in qspi_xfer()
855 	mcr_val = qspi_read32(priv->flags, &priv->regs->mcr);  in qspi_module_disable()
860 	qspi_write32(priv->flags, &priv->regs->mcr, mcr_val);  in qspi_module_disable()
867 	smpr_val = qspi_read32(priv->flags, &priv->regs->smpr);  in qspi_cfg_smpr()
870 	qspi_write32(priv->flags, &priv->regs->smpr, smpr_val);  in qspi_cfg_smpr()
911 	qspi->priv.flags |= QSPI_FLAG_REGMAP_ENDIAN_BIG;  in spi_setup_slave()
927 	mcr_val = qspi_read32(qspi->priv.flags, &regs->mcr);  in spi_setup_slave()
933 	qspi_write32(qspi->priv.flags, &regs->mcr,  in spi_setup_slave()
952 	qspi_write32(qspi->priv.flags, &regs->sfa1ad,  in spi_setup_slave()
954 	qspi_write32(qspi->priv.flags, &regs->sfa2ad,  in spi_setup_slave()
956 	qspi_write32(qspi->priv.flags, &regs->sfb1ad,  in spi_setup_slave()
958 	qspi_write32(qspi->priv.flags, &regs->sfb2ad,  in spi_setup_slave()
990 		const void *dout, void *din, unsigned long flags)  in spi_xfer()  argument
994 	return qspi_xfer(&qspi->priv, bitlen, dout, din, flags);  in spi_xfer()
1025 	priv->flags = plat->flags;  in fsl_qspi_probe()
1046 	mcr_val = qspi_read32(priv->flags, &priv->regs->mcr);  in fsl_qspi_probe()
1052 	qspi_write32(priv->flags, &priv->regs->mcr,  in fsl_qspi_probe()
1085 	qspi_write32(priv->flags, &priv->regs->sfa1ad,  in fsl_qspi_probe()
1091 		qspi_write32(priv->flags, &priv->regs->sfa2ad,  in fsl_qspi_probe()
1093 		qspi_write32(priv->flags, &priv->regs->sfb1ad,  in fsl_qspi_probe()
1095 		qspi_write32(priv->flags, &priv->regs->sfb2ad,  in fsl_qspi_probe()
1099 		qspi_write32(priv->flags, &priv->regs->sfa2ad,  in fsl_qspi_probe()
1101 		qspi_write32(priv->flags, &priv->regs->sfb1ad,  in fsl_qspi_probe()
1103 		qspi_write32(priv->flags, &priv->regs->sfb2ad,  in fsl_qspi_probe()
1133 		plat->flags |= QSPI_FLAG_REGMAP_ENDIAN_BIG;  in fsl_qspi_ofdata_to_platdata()
1173 	      plat->flags & QSPI_FLAG_REGMAP_ENDIAN_BIG ? "be" : "le"  in fsl_qspi_ofdata_to_platdata()
1180 		const void *dout, void *din, unsigned long flags)  in fsl_qspi_xfer()  argument
1188 	return qspi_xfer(priv, bitlen, dout, din, flags);  in fsl_qspi_xfer()