51 	struct fotg210_regs      *regs;  member
79 	struct fotg210_regs *regs = chip->regs;  in ep_reset()  local
83 		setbits_le32(&regs->iep[ep - 1], IEP_RESET);  in ep_reset()
85 		clrbits_le32(&regs->iep[ep - 1], IEP_RESET);  in ep_reset()
87 		clrbits_le32(&regs->iep[ep - 1], IEP_STALL);  in ep_reset()
90 		setbits_le32(&regs->oep[ep - 1], OEP_RESET);  in ep_reset()
92 		clrbits_le32(&regs->oep[ep - 1], OEP_RESET);  in ep_reset()
94 		clrbits_le32(&regs->oep[ep - 1], OEP_STALL);  in ep_reset()
102 	struct fotg210_regs *regs = chip->regs;  in fotg210_reset()  local
108 	writel(DEVCTRL_EN, &regs->dev_ctrl);  in fotg210_reset()
112 	writel(0, &regs->dev_addr);  in fotg210_reset()
115 	writel(7, &regs->idle);  in fotg210_reset()
118 	writel(IMR_MASK, &regs->imr);  in fotg210_reset()
119 	writel(GIMR_MASK, &regs->gimr);  in fotg210_reset()
120 	writel(GIMR0_MASK, &regs->gimr0);  in fotg210_reset()
121 	writel(GIMR1_MASK, &regs->gimr1);  in fotg210_reset()
122 	writel(GIMR2_MASK, &regs->gimr2);  in fotg210_reset()
125 	writel(ISR_MASK, &regs->isr);  in fotg210_reset()
126 	writel(0, &regs->gisr);  in fotg210_reset()
127 	writel(0, &regs->gisr0);  in fotg210_reset()
128 	writel(0, &regs->gisr1);  in fotg210_reset()
129 	writel(0, &regs->gisr2);  in fotg210_reset()
132 	setbits_le32(&regs->dev_ctrl, DEVCTRL_RESET);  in fotg210_reset()
134 	if (readl(&regs->dev_ctrl) & DEVCTRL_RESET) {  in fotg210_reset()
140 	setbits_le32(&regs->cxfifo, CXFIFO_CXFIFOCLR);  in fotg210_reset()
142 	if (readl(&regs->cxfifo) & CXFIFO_CXFIFOCLR) {  in fotg210_reset()
148 	writel(EPMAP14_DEFAULT, &regs->epmap14);  in fotg210_reset()
149 	writel(EPMAP58_DEFAULT, &regs->epmap58);  in fotg210_reset()
150 	writel(FIFOMAP_DEFAULT, &regs->fifomap);  in fotg210_reset()
151 	writel(0, &regs->fifocfg);  in fotg210_reset()
153 		writel(CFG_EPX_MAX_PACKET_SIZE, &regs->iep[i]);  in fotg210_reset()
154 		writel(CFG_EPX_MAX_PACKET_SIZE, &regs->oep[i]);  in fotg210_reset()
159 		writel(FIFOCSR_RESET, &regs->fifocsr[i]);  in fotg210_reset()
161 		if (readl(&regs->fifocsr[i]) & FIFOCSR_RESET) {  in fotg210_reset()
168 	writel(IMR_IRQLH | IMR_HOST | IMR_OTG, &regs->imr);  in fotg210_reset()
169 	writel(ISR_MASK, &regs->isr);  in fotg210_reset()
171 	writel(GIMR0_CXOUT | GIMR0_CXIN, &regs->gimr0);  in fotg210_reset()
173 	writel(GIMR1_MASK, &regs->gimr1);  in fotg210_reset()
176 		| GIMR2_ZLPRX | GIMR2_ZLPTX, &regs->gimr2);  in fotg210_reset()
178 	writel(0, &regs->gimr);  in fotg210_reset()
181 	writel(3, &regs->idle);  in fotg210_reset()
184 	setbits_le32(&regs->dev_ctrl, DEVCTRL_GIRQ_EN);  in fotg210_reset()
191 	struct fotg210_regs *regs = chip->regs;  in fotg210_cxwait()  local
196 		if ((readl(&regs->cxfifo) & mask) != mask)  in fotg210_cxwait()
211 	struct fotg210_regs *regs = chip->regs;  in fotg210_dma()  local
224 		if (!(readl(&regs->dma_ctrl) & DMACTRL_START)) {  in fotg210_dma()
241 	writel(virt_to_phys(buf), &regs->dma_addr);  in fotg210_dma()
248 			writel(DMAFIFO_CX, &regs->dma_fifo);  in fotg210_dma()
252 			writel(DMAFIFO_FIFO(fifo), &regs->dma_fifo);  in fotg210_dma()
254 		writel(DMACTRL_LEN(len) | DMACTRL_MEM2FIFO, &regs->dma_ctrl);  in fotg210_dma()
259 			writel(DMAFIFO_CX, &regs->dma_fifo);  in fotg210_dma()
261 				blen = CXFIFO_BYTES(readl(&regs->cxfifo));  in fotg210_dma()
264 			writel(DMAFIFO_FIFO(fifo), &regs->dma_fifo);  in fotg210_dma()
265 			blen = FIFOCSR_BYTES(readl(&regs->fifocsr[fifo]));  in fotg210_dma()
268 		writel(DMACTRL_LEN(len) | DMACTRL_FIFO2MEM, &regs->dma_ctrl);  in fotg210_dma()
272 	setbits_le32(&regs->dma_ctrl, DMACTRL_START);  in fotg210_dma()
277 		tmp = readl(&regs->gisr2);  in fotg210_dma()
297 		writel(DMACTRL_ABORT | DMACTRL_CLRFF, &regs->dma_ctrl);  in fotg210_dma()
299 	writel(0, &regs->gisr2);  in fotg210_dma()
300 	writel(0, &regs->dma_fifo);  in fotg210_dma()
323 	struct fotg210_regs *regs = chip->regs;  in fotg210_setup()  local
331 		if (readl(&regs->otgcsr) & OTGCSR_DEV_B) {  in fotg210_setup()
333 			if (readl(&regs->dev_ctrl) & DEVCTRL_HS) {  in fotg210_setup()
337 				writel(SOFMTR_TMR(1100), &regs->sof_mtr);  in fotg210_setup()
342 				writel(SOFMTR_TMR(10000), &regs->sof_mtr);  in fotg210_setup()
350 	writel(DMAFIFO_CX, &regs->dma_fifo);  in fotg210_setup()
352 	tmp[0] = readl(&regs->ep0_data);  in fotg210_setup()
353 	tmp[1] = readl(&regs->ep0_data);  in fotg210_setup()
355 	writel(0, &regs->dma_fifo);  in fotg210_setup()
370 				writel(chip->addr, &regs->dev_addr);  in fotg210_setup()
374 					&regs->dev_addr);  in fotg210_setup()
384 			writel(chip->addr, &regs->dev_addr);  in fotg210_setup()
409 				setbits_le32(&regs->iep[id - 1], IEP_STALL);  in fotg210_setup()
410 				setbits_le32(&regs->oep[id - 1], OEP_STALL);  in fotg210_setup()
447 		setbits_le32(&regs->cxfifo, CXFIFO_CXFIN);  in fotg210_setup()
451 		setbits_le32(&regs->cxfifo, CXFIFO_CXSTALL | CXFIFO_CXFIN);  in fotg210_setup()
468 	struct fotg210_regs *regs = chip->regs;  in fotg210_recv()  local
492 		setbits_le32(&regs->gimr1,  in fotg210_recv()
505 	struct fotg210_regs *regs = chip->regs;  in fotg210_ep_enable()  local
520 		setbits_le32(&regs->fifomap, FIFOMAP(id, FIFOMAP_IN));  in fotg210_ep_enable()
527 		setbits_le32(&regs->fifocfg,  in fotg210_ep_enable()
532 		setbits_le32(&regs->fifocfg,  in fotg210_ep_enable()
537 		setbits_le32(&regs->fifocfg,  in fotg210_ep_enable()
549 	struct fotg210_regs *regs = chip->regs;  in fotg210_ep_disable()  local
555 	clrbits_le32(&regs->fifocfg, FIFOCFG(id, FIFOCFG_CFG_MASK));  in fotg210_ep_disable()
556 	clrbits_le32(&regs->fifomap, FIFOMAP(id, FIFOMAP_DIR_MASK));  in fotg210_ep_disable()
587 	struct fotg210_regs *regs = chip->regs;  in fotg210_ep_queue()  local
629 			clrbits_le32(&regs->gimr1,  in fotg210_ep_queue()
672 	struct fotg210_regs *regs = chip->regs;  in fotg210_ep_halt()  local
684 				setbits_le32(&regs->iep[ep->id - 1],  in fotg210_ep_halt()
687 				setbits_le32(&regs->oep[ep->id - 1],  in fotg210_ep_halt()
692 				clrbits_le32(&regs->iep[ep->id - 1],  in fotg210_ep_halt()
695 				clrbits_le32(&regs->oep[ep->id - 1],  in fotg210_ep_halt()
710 	struct fotg210_regs *regs = chip->regs;  in pullup()  local
717 			setbits_le32(&regs->dev_ctrl, DEVCTRL_EN);  in pullup()
719 			clrbits_le32(&regs->phy_tmsr, PHYTMSR_UNPLUG);  in pullup()
725 		writel(chip->addr, &regs->dev_addr);  in pullup()
727 		setbits_le32(&regs->phy_tmsr, PHYTMSR_UNPLUG);  in pullup()
729 		clrbits_le32(&regs->dev_ctrl, DEVCTRL_EN);  in pullup()
749 	struct fotg210_regs *regs;  in fotg210_get_frame()  local
752 	regs = chip->regs;  in fotg210_get_frame()
754 	return SOFFNR_FNR(readl(&regs->sof_fnr));  in fotg210_get_frame()
773 	.regs = (void __iomem *)CONFIG_FOTG210_BASE,
837 	struct fotg210_regs *regs = chip->regs;  in usb_gadget_handle_interrupts()  local
840 	isr  = readl(&regs->isr) & (~readl(&regs->imr));  in usb_gadget_handle_interrupts()
841 	gisr = readl(&regs->gisr) & (~readl(&regs->gimr));  in usb_gadget_handle_interrupts()
845 	writel(ISR_DEV, &regs->isr);  in usb_gadget_handle_interrupts()
849 		st = readl(&regs->gisr0);  in usb_gadget_handle_interrupts()
856 		writel(st & GISR0_CXABORT, &regs->gisr0);  in usb_gadget_handle_interrupts()
857 		writel(0, &regs->gisr0);  in usb_gadget_handle_interrupts()
868 			setbits_le32(&regs->cxfifo, CXFIFO_CXFIN);  in usb_gadget_handle_interrupts()
873 		st = readl(&regs->gisr1);  in usb_gadget_handle_interrupts()
882 		st = readl(&regs->gisr2);  in usb_gadget_handle_interrupts()
889 		writel(st, &regs->gisr2);  in usb_gadget_handle_interrupts()
890 		writel(0, &regs->gisr2);  in usb_gadget_handle_interrupts()