227 	struct usb_ctlr *usbctlr;  in tegra_ehci_set_usbmode()  local
230 	usbctlr = config->reg;  in tegra_ehci_set_usbmode()
232 	tmp = ehci_readl(&usbctlr->usb_mode);  in tegra_ehci_set_usbmode()
234 	ehci_writel(&usbctlr->usb_mode, tmp);  in tegra_ehci_set_usbmode()
280 				  struct usb_ctlr *usbctlr)  in usbf_reset_controller()  argument
290 		setbits_le32(&usbctlr->usb1_legacy_ctrl, USB1_NO_LEGACY_MODE);  in usbf_reset_controller()
293 	setbits_le32(&usbctlr->susp_ctrl, UTMIP_RESET);  in usbf_reset_controller()
297 		setbits_le32(&usbctlr->susp_ctrl, UTMIP_PHY_ENB);  in usbf_reset_controller()
314 	struct usb_ctlr *usbctlr = config->reg;  in init_phy_mux()  local
318 		clrsetbits_le32(&usbctlr->port_sc1, PTS1_MASK,  in init_phy_mux()
320 		clrbits_le32(&usbctlr->port_sc1, STS1);  in init_phy_mux()
322 		clrsetbits_le32(&usbctlr->port_sc1, PTS_MASK,  in init_phy_mux()
324 		clrbits_le32(&usbctlr->port_sc1, STS);  in init_phy_mux()
328 	clrsetbits_le32(&usbctlr->usb_mode, USBMODE_CM_HC,  in init_phy_mux()
337 	clrsetbits_le32(&usbctlr->hostpc1_devlc, PTS_MASK,  in init_phy_mux()
339 	clrbits_le32(&usbctlr->hostpc1_devlc, STS);  in init_phy_mux()
351 	struct usb_ctlr *usbctlr = config->reg;  in init_utmi_usb_controller()  local
358 	usbf_reset_controller(config, usbctlr);  in init_utmi_usb_controller()
361 	clrbits_le32(&usbctlr->utmip_misc_cfg1, UTMIP_PHY_XTAL_CLOCKEN);  in init_utmi_usb_controller()
367 	clrsetbits_le32(&usbctlr->phy_vbus_sensors, b_sess_valid_mask,  in init_utmi_usb_controller()
376 		clrsetbits_le32(&usbctlr->usb1_legacy_ctrl,  in init_utmi_usb_controller()
390 		val = readl(&usbctlr->utmip_misc_cfg1);  in init_utmi_usb_controller()
397 		writel(val, &usbctlr->utmip_misc_cfg1);  in init_utmi_usb_controller()
400 		val = readl(&usbctlr->utmip_pll_cfg1);  in init_utmi_usb_controller()
407 		writel(val, &usbctlr->utmip_pll_cfg1);  in init_utmi_usb_controller()
436 		val = readl(&usbctlr->utmip_xcvr_cfg0);  in init_utmi_usb_controller()
443 		writel(val, &usbctlr->utmip_xcvr_cfg0);  in init_utmi_usb_controller()
444 		clrsetbits_le32(&usbctlr->utmip_xcvr_cfg1,  in init_utmi_usb_controller()
465 		clrbits_le32(&usbctlr->utmip_misc_cfg0,  in init_utmi_usb_controller()
470 	clrsetbits_le32(&usbctlr->utmip_bias_cfg1,  in init_utmi_usb_controller()
475 	clrsetbits_le32(&usbctlr->utmip_debounce_cfg0,  in init_utmi_usb_controller()
480 		clrsetbits_le32(&usbctlr->utmip_debounce_cfg0,  in init_utmi_usb_controller()
484 		clrsetbits_le32(&usbctlr->utmip_bias_cfg1,  in init_utmi_usb_controller()
489 	setbits_le32(&usbctlr->utmip_tx_cfg0, UTMIP_FS_PREAMBLE_J);  in init_utmi_usb_controller()
492 	setbits_le32(&usbctlr->utmip_bat_chrg_cfg0, UTMIP_PD_CHRG);  in init_utmi_usb_controller()
494 	clrbits_le32(&usbctlr->utmip_xcvr_cfg0, UTMIP_XCVR_LSBIAS_SE);  in init_utmi_usb_controller()
495 	setbits_le32(&usbctlr->utmip_spare_cfg0, FUSE_SETUP_SEL);  in init_utmi_usb_controller()
507 	val = readl(&usbctlr->utmip_hsrx_cfg0);  in init_utmi_usb_controller()
512 	writel(val, &usbctlr->utmip_hsrx_cfg0);  in init_utmi_usb_controller()
515 	clrsetbits_le32(&usbctlr->utmip_hsrx_cfg1,  in init_utmi_usb_controller()
523 	setbits_le32(&usbctlr->utmip_misc_cfg1, UTMIP_PHY_XTAL_CLOCKEN);  in init_utmi_usb_controller()
539 	clrbits_le32(&usbctlr->susp_ctrl, UTMIP_RESET);  in init_utmi_usb_controller()
543 		if (readl(&usbctlr->susp_ctrl) & USB_PHY_CLK_VALID)  in init_utmi_usb_controller()
551 	clrbits_le32(&usbctlr->icusb_ctrl, IC_ENB1);  in init_utmi_usb_controller()
557 	clrbits_le32(&usbctlr->utmip_xcvr_cfg0, UTMIP_FORCE_PD_POWERDOWN |  in init_utmi_usb_controller()
559 	clrbits_le32(&usbctlr->utmip_xcvr_cfg1, UTMIP_FORCE_PDDISC_POWERDOWN |  in init_utmi_usb_controller()
590 	struct usb_ctlr *usbctlr = config->reg;  in init_ulpi_usb_controller()  local
615 	usbf_reset_controller(config, usbctlr);  in init_ulpi_usb_controller()
618 	setbits_le32(&usbctlr->ulpi_timing_ctrl_0,  in init_ulpi_usb_controller()
625 	setbits_le32(&usbctlr->susp_ctrl, ULPI_PHY_ENB);  in init_ulpi_usb_controller()
629 	writel(val, &usbctlr->ulpi_timing_ctrl_1);  in init_ulpi_usb_controller()
634 	writel(val, &usbctlr->ulpi_timing_ctrl_1);  in init_ulpi_usb_controller()
640 	writel(val, &usbctlr->ulpi_timing_ctrl_1);  in init_ulpi_usb_controller()
644 	ulpi_vp.viewport_addr = (u32)&usbctlr->ulpi_viewport;  in init_ulpi_usb_controller()
656 	setbits_le32(&usbctlr->port_sc1, WKCN | WKDS | WKOC);  in init_ulpi_usb_controller()
659 	setbits_le32(&usbctlr->susp_ctrl, USB_SUSP_CLR);  in init_ulpi_usb_controller()
661 		if (readl(&usbctlr->susp_ctrl) & USB_PHY_CLK_VALID)  in init_ulpi_usb_controller()
667 	clrbits_le32(&usbctlr->susp_ctrl, USB_SUSP_CLR);  in init_ulpi_usb_controller()
794 	struct usb_ctlr *usbctlr;  in usb_common_uninit()  local
796 	usbctlr = priv->reg;  in usb_common_uninit()
799 	writel(0, &usbctlr->usb_cmd);  in usb_common_uninit()
803 	writel(2, &usbctlr->usb_cmd);  in usb_common_uninit()