Lines Matching refs:ccm
245 struct sunxi_ccm_reg * const ccm = in sunxi_dw_hdmi_lcdc_init() local
254 setbits_le32(&ccm->ahb_reset1_cfg, 1 << AHB_RESET_OFFSET_LCD0); in sunxi_dw_hdmi_lcdc_init()
257 setbits_le32(&ccm->ahb_gate1, 1 << AHB_GATE_OFFSET_LCD0); in sunxi_dw_hdmi_lcdc_init()
259 &ccm->lcd0_clk_cfg); in sunxi_dw_hdmi_lcdc_init()
264 setbits_le32(&ccm->ahb_reset1_cfg, 1 << AHB_RESET_OFFSET_LCD1); in sunxi_dw_hdmi_lcdc_init()
267 setbits_le32(&ccm->ahb_gate1, 1 << AHB_GATE_OFFSET_LCD1); in sunxi_dw_hdmi_lcdc_init()
269 &ccm->lcd1_clk_cfg); in sunxi_dw_hdmi_lcdc_init()
329 struct sunxi_ccm_reg * const ccm = in sunxi_dw_hdmi_probe() local
337 clrsetbits_le32(&ccm->hdmi_clk_cfg, CCM_HDMI_CTRL_PLL_MASK, in sunxi_dw_hdmi_probe()
341 setbits_le32(&ccm->ahb_reset1_cfg, 1 << AHB_RESET_OFFSET_HDMI); in sunxi_dw_hdmi_probe()
342 setbits_le32(&ccm->ahb_reset1_cfg, 1 << AHB_RESET_OFFSET_HDMI2); in sunxi_dw_hdmi_probe()
343 setbits_le32(&ccm->ahb_gate1, 1 << AHB_GATE_OFFSET_HDMI); in sunxi_dw_hdmi_probe()
344 setbits_le32(&ccm->hdmi_slow_clk_cfg, CCM_HDMI_SLOW_CTRL_DDC_GATE); in sunxi_dw_hdmi_probe()
347 setbits_le32(&ccm->hdmi_clk_cfg, CCM_HDMI_CTRL_GATE); in sunxi_dw_hdmi_probe()