1851 #define MDCNFG_PrChrg(Tcpu)		/*  Pre-Charge time [2..32 Tcpu]   */ \  argument
1852 			(((Tcpu) - 2)/2 << FShft (MDCNFG_TRP))
1853 #define MDCNFG_CeilPrChrg(Tcpu)		/*  Ceil. of PrChrg [2..32 Tcpu]   */ \  argument
1854 			(((Tcpu) - 1)/2 << FShft (MDCNFG_TRP))
1856 #define MDCNFG_Ref(Tcpu)		/*  Refresh time [2..32 Tcpu]	   */ \  argument
1857 			(((Tcpu) - 2)/2 << FShft (MDCNFG_TRASR))
1858 #define MDCNFG_CeilRef(Tcpu)		/*  Ceil. of Ref [2..32 Tcpu]	   */ \  argument
1859 			(((Tcpu) - 1)/2 << FShft (MDCNFG_TRASR))
1861 #define MDCNFG_DataLtch(Tcpu)		/*  Data Latch delay [0..3 Tcpu]   */ \  argument
1862 			((Tcpu) << FShft (MDCNFG_TDL))
1865 #define MDCNFG_RefInt(Tcpu)		/*  min. Refresh Interval	   */ \  argument
1867 			((Tcpu)/8 << FShft (MDCNFG_DRI))
1954 #define MSC_1stRdAcc(Tcpu)		/*  1st Read Access time (burst    */ \  argument
1956 			((((Tcpu) - 3)/2) << FShft (MSC_RDF))
1957 #define MSC_Ceil1stRdAcc(Tcpu)		/*  Ceil. of 1stRdAcc [3..65 Tcpu] */ \  argument
1958 			((((Tcpu) - 2)/2) << FShft (MSC_RDF))
1959 #define MSC_RdAcc(Tcpu)			/*  Read Access time (non-burst    */ \  argument
1961 			((((Tcpu) - 2)/2) << FShft (MSC_RDF))
1962 #define MSC_CeilRdAcc(Tcpu)		/*  Ceil. of RdAcc [2..64 Tcpu]    */ \  argument
1963 			((((Tcpu) - 1)/2) << FShft (MSC_RDF))
1966 #define MSC_NxtRdAcc(Tcpu)		/*  Next Read Access time (burst   */ \  argument
1968 			((((Tcpu) - 2)/2) << FShft (MSC_RDN))
1969 #define MSC_CeilNxtRdAcc(Tcpu)		/*  Ceil. of NxtRdAcc [2..64 Tcpu] */ \  argument
1970 			((((Tcpu) - 1)/2) << FShft (MSC_RDN))
1971 #define MSC_WrAcc(Tcpu)			/*  Write Access time (non-burst   */ \  argument
1973 			((((Tcpu) - 2)/2) << FShft (MSC_RDN))
1974 #define MSC_CeilWrAcc(Tcpu)		/*  Ceil. of WrAcc [2..64 Tcpu]    */ \  argument
1975 			((((Tcpu) - 1)/2) << FShft (MSC_RDN))
1978 #define MSC_Rec(Tcpu)			/*  Recovery time [0..28 Tcpu]	   */ \  argument
1979 			(((Tcpu)/4) << FShft (MSC_RRR))
1980 #define MSC_CeilRec(Tcpu)		/*  Ceil. of Rec [0..28 Tcpu]	   */ \  argument
1981 			((((Tcpu) + 3)/4) << FShft (MSC_RRR))
2015 #define MECR_IOClk(Tcpu)		/*  I/O Clock [2..64 Tcpu]	   */ \  argument
2016 			((((Tcpu) - 2)/2) << FShft (MECR_BSIO))
2017 #define MECR_CeilIOClk(Tcpu)		/*  Ceil. of IOClk [2..64 Tcpu]    */ \  argument
2018 			((((Tcpu) - 1)/2) << FShft (MECR_BSIO))
2021 #define MECR_AttrClk(Tcpu)		/*  Attribute Clock [2..64 Tcpu]   */ \  argument
2022 			((((Tcpu) - 2)/2) << FShft (MECR_BSA))
2023 #define MECR_CeilAttrClk(Tcpu)		/*  Ceil. of AttrClk [2..64 Tcpu]  */ \  argument
2024 			((((Tcpu) - 1)/2) << FShft (MECR_BSA))
2026 #define MECR_MemClk(Tcpu)		/*  Memory Clock [2..64 Tcpu]	   */ \  argument
2027 			((((Tcpu) - 2)/2) << FShft (MECR_BSM))
2028 #define MECR_CeilMemClk(Tcpu)		/*  Ceil. of MemClk [2..64 Tcpu]   */ \  argument
2029 			((((Tcpu) - 1)/2) << FShft (MECR_BSM))
2718 #define LCCR0_DMADel(Tcpu)		/*  palette DMA request Delay	   */ \  argument
2720 			((Tcpu)/2 << FShft (LCCR0_PDD))