94   selector->Emit(opcode, g.DefineAsRegister(node),  in VisitRR()
100   selector->Emit(opcode, g.DefineAsRegister(node),  in VisitRRR()
121   selector->Emit(opcode, g.DefineSameAsFirst(node),  in VisitRRRShuffle()
129   selector->Emit(opcode, g.DefineAsRegister(node),  in VisitRRI()
136   selector->Emit(opcode, g.DefineAsRegister(node),  in VisitRRIR()
321     selector->Emit(div_opcode, result_operand, left_operand, right_operand);  in EmitDiv()
327   selector->Emit(f64i32_opcode, left_double_operand, left_operand);  in EmitDiv()
328   selector->Emit(f64i32_opcode, right_double_operand, right_operand);  in EmitDiv()
329   selector->Emit(kArmVdivF64, result_double_operand, left_double_operand,  in EmitDiv()
331   selector->Emit(i32f64_opcode, result_operand, result_double_operand);  in EmitDiv()
356     selector->Emit(kArmMls, result_operand, div_operand, right_operand,  in VisitMod()
360     selector->Emit(kArmMul, mul_operand, div_operand, right_operand);  in VisitMod()
361     selector->Emit(kArmSub | AddressingModeField::encode(kMode_Operand2_R),  in VisitMod()
384   selector->Emit(opcode, 1, output, input_count, inputs);  in EmitLoad()
403   selector->Emit(opcode, 0, nullptr, input_count, inputs);  in EmitStore()
423   selector->Emit(code, arraysize(outputs), outputs, arraysize(inputs), inputs,  in VisitPairAtomicBinOp()
442   selector->Emit(code, arraysize(outputs), outputs, arraysize(inputs), inputs,  in VisitNarrowAtomicBinOp()
453   Emit(kArchStackSlot, g.DefineAsRegister(node),  in VisitStackSlot()
459   Emit(kArchDebugAbort, g.NoOutput(), g.UseFixed(node->InputAt(0), r1));  in VisitDebugAbort()
559     Emit(code, 0, nullptr, input_count, inputs, temp_count, temps);  in VisitStore()
620       Emit(kArmVmovF32U32, g.DefineAsRegister(node), temp);  in VisitUnalignedLoad()
646       Emit(add_opcode, 1, &addr, input_count, inputs);  in VisitUnalignedLoad()
654         Emit(op, g.DefineAsRegister(node), addr);  in VisitUnalignedLoad()
661         Emit(opcode, fp_lo, addr, g.TempImmediate(0));  in VisitUnalignedLoad()
662         Emit(opcode, fp_hi, addr, g.TempImmediate(4));  in VisitUnalignedLoad()
663         Emit(kArmVmovF64U32U32, g.DefineAsRegister(node), fp_lo, fp_hi);  in VisitUnalignedLoad()
693       Emit(kArmVmovU32F32, inputs[0], g.UseRegister(value));  in VisitUnalignedStore()
720           Emit(add_opcode, 1, &address, input_count, inputs);  in VisitUnalignedStore()
729         Emit(op, 0, nullptr, input_count, inputs);  in VisitUnalignedStore()
740         Emit(kArmVmovU32U32F64, arraysize(fp), fp, input_count, inputs);  in VisitUnalignedStore()
750         Emit(kArmAdd | AddressingModeField::encode(kMode_Operand2_I), base4,  in VisitUnalignedStore()
774     selector->Emit(opcode, g.DefineAsRegister(node), g.UseRegister(left),  in EmitBic()
778   selector->Emit(opcode | AddressingModeField::encode(kMode_Operand2_R),  in EmitBic()
789   selector->Emit(kArmUbfx, g.DefineAsRegister(node), g.UseRegister(left),  in EmitUbfx()
828           Emit(kArmUxtb, g.DefineAsRegister(m.node()),  in VisitWord32And()
835           Emit(kArmUxth, g.DefineAsRegister(m.node()),  in VisitWord32And()
857       Emit(kArmUxth, g.DefineAsRegister(m.node()),  in VisitWord32And()
863       Emit(kArmBic | AddressingModeField::encode(kMode_Operand2_I),  in VisitWord32And()
884         Emit(kArmBfc, g.DefineSameAsFirst(node), g.UseRegister(m.left().node()),  in VisitWord32And()
908       Emit(opcode, g.DefineAsRegister(node), value_operand, shift_operand);  in VisitWord32Xor()
911     Emit(opcode | AddressingModeField::encode(kMode_Operand2_R),  in VisitWord32Xor()
991         Emit(kArmSxth, g.DefineAsRegister(node),  in VisitWord32Sar()
995         Emit(kArmSxtb, g.DefineAsRegister(node),  in VisitWord32Sar()
999         Emit(kArmSbfx, g.DefineAsRegister(node),  in VisitWord32Sar()
1024     Emit(kArmAddPair, 2, outputs, 4, inputs);  in VisitInt32PairAdd()
1028     Emit(kArmAdd | AddressingModeField::encode(kMode_Operand2_R),  in VisitInt32PairAdd()
1049     Emit(kArmSubPair, 2, outputs, 4, inputs);  in VisitInt32PairSub()
1053     Emit(kArmSub | AddressingModeField::encode(kMode_Operand2_R),  in VisitInt32PairSub()
1072     Emit(kArmMulPair, 2, outputs, 4, inputs);  in VisitInt32PairMul()
1076     Emit(kArmMul | AddressingModeField::encode(kMode_Operand2_R),  in VisitInt32PairMul()
1115   selector->Emit(opcode, output_count, outputs, 3, inputs, temp_count, temps);  in VisitWord32PairShift()
1151   Emit(kArmDsbIsb, g.NoOutput());  in VisitSpeculationFence()
1161         Emit(kArmMla, g.DefineAsRegister(node),  in VisitInt32Add()
1169         Emit(kArmSmmla, g.DefineAsRegister(node),  in VisitInt32Add()
1178           Emit(kArmUxtab, g.DefineAsRegister(node),  in VisitInt32Add()
1183           Emit(kArmUxtah, g.DefineAsRegister(node),  in VisitInt32Add()
1196             Emit(kArmSxtab, g.DefineAsRegister(node),  in VisitInt32Add()
1201             Emit(kArmSxtah, g.DefineAsRegister(node),  in VisitInt32Add()
1217         Emit(kArmMla, g.DefineAsRegister(node),  in VisitInt32Add()
1225         Emit(kArmSmmla, g.DefineAsRegister(node),  in VisitInt32Add()
1234           Emit(kArmUxtab, g.DefineAsRegister(node),  in VisitInt32Add()
1239           Emit(kArmUxtah, g.DefineAsRegister(node),  in VisitInt32Add()
1252             Emit(kArmSxtab, g.DefineAsRegister(node),  in VisitInt32Add()
1257             Emit(kArmSxtah, g.DefineAsRegister(node),  in VisitInt32Add()
1279     Emit(kArmMls, g.DefineAsRegister(node), g.UseRegister(mright.left().node()),  in VisitInt32Sub()
1297   selector->Emit(kArmSmull, 2, outputs, 2, inputs);  in EmitInt32MulWithOverflow()
1315       Emit(kArmAdd | AddressingModeField::encode(kMode_Operand2_R_LSL_I),  in VisitInt32Mul()
1322       Emit(kArmRsb | AddressingModeField::encode(kMode_Operand2_R_LSL_I),  in VisitInt32Mul()
1337   Emit(kArmUmull, arraysize(outputs), outputs, arraysize(inputs), inputs);  in VisitUint32MulHigh()
1439     Emit(kArmVmlaF32, g.DefineSameAsFirst(node),
1446     Emit(kArmVmlaF32, g.DefineSameAsFirst(node), g.UseRegister(m.left().node()),
1460     Emit(kArmVmlaF64, g.DefineSameAsFirst(node),  in VisitFloat64Add()
1467     Emit(kArmVmlaF64, g.DefineSameAsFirst(node), g.UseRegister(m.left().node()),  in VisitFloat64Add()
1480     Emit(kArmVmlsF32, g.DefineSameAsFirst(node), g.UseRegister(m.left().node()),  in VisitFloat32Sub()
1493     Emit(kArmVmlsF64, g.DefineSameAsFirst(node), g.UseRegister(m.left().node()),  in VisitFloat64Sub()
1503   Emit(kArmVmodF64, g.DefineAsFixed(node, d0), g.UseFixed(node->InputAt(0), d0),  in VisitFloat64Mod()
1510   Emit(opcode, g.DefineAsFixed(node, d0), g.UseFixed(node->InputAt(0), d0),  in VisitFloat64Ieee754Binop()
1518   Emit(opcode, g.DefineAsFixed(node, d0), g.UseFixed(node->InputAt(0), d0))  in VisitFloat64Ieee754Unop()
1529     Emit(kArchPrepareCallCFunction | MiscField::encode(static_cast<int>(  in EmitPrepareArguments()
1538         Emit(kArmPoke | MiscField::encode(slot), g.NoOutput(),  in EmitPrepareArguments()
1547       Emit(kArmPush, g.NoOutput(), g.UseRegister(input.node));  in EmitPrepareArguments()
1568       Emit(kArmPeek, g.DefineAsRegister(output.node),  in EmitPrepareResults()
1934         Emit(kArmSub | AddressingModeField::encode(kMode_Operand2_I),  in VisitSwitch()
2057     Emit(kArmVmovF64U32U32, g.DefineAsRegister(node), g.UseRegister(right),  in VisitFloat64InsertLowWord32()
2061   Emit(kArmVmovLowF64U32, g.DefineSameAsFirst(node), g.UseRegister(left),  in VisitFloat64InsertLowWord32()
2073     Emit(kArmVmovF64U32U32, g.DefineAsRegister(node), g.UseRegister(left),  in VisitFloat64InsertHighWord32()
2077   Emit(kArmVmovHighF64U32, g.DefineSameAsFirst(node), g.UseRegister(left),  in VisitFloat64InsertHighWord32()
2103   Emit(opcode | AddressingModeField::encode(kMode_Offset_RR),  in VisitWord32AtomicLoad()
2136   Emit(code, 0, nullptr, input_count, inputs);  in VisitWord32AtomicStore()
2171   Emit(code, 1, outputs, input_count, inputs, arraysize(temps), temps);  in VisitWord32AtomicExchange()
2209   Emit(code, 1, outputs, input_count, inputs, arraysize(temps), temps);  in VisitWord32AtomicCompareExchange()
2247   Emit(code, 1, outputs, input_count, inputs, arraysize(temps), temps);  in VisitWord32AtomicBinaryOperation()
2276   Emit(code, arraysize(outputs), outputs, arraysize(inputs), inputs,  in VISIT_ATOMIC_BINOP()
2294   Emit(code, 0, nullptr, arraysize(inputs), inputs, arraysize(temps), temps);  in VisitWord32AtomicPairStore()
2366   Emit(code, arraysize(outputs), outputs, arraysize(inputs), inputs,  in VISIT_ATOMIC_BINOP()
2395   Emit(code, arraysize(outputs), outputs, arraysize(inputs), inputs,  in VisitWord64AtomicNarrowExchange()
2412   Emit(code, arraysize(outputs), outputs, arraysize(inputs), inputs,  in VisitWord32AtomicPairCompareExchange()
2444   Emit(code, arraysize(outputs), outputs, arraysize(inputs), inputs,  in VisitWord64AtomicNarrowCompareExchange()
2563   Emit(kArmS128Zero, g.DefineAsRegister(node), g.DefineAsRegister(node));  in VisitS128Zero()
2614   Emit(kArmS128Select, g.DefineSameAsFirst(node),
2718       Emit(kArmS128Dup, g.DefineAsRegister(node), g.UseRegister(input0),  in VisitS8x16Shuffle()
2727       Emit(kArmS32x4Shuffle, g.DefineAsRegister(node), src0, src1,  in VisitS8x16Shuffle()
2734     Emit(kArmS128Dup, g.DefineAsRegister(node), g.UseRegister(input0),  in VisitS8x16Shuffle()
2740     Emit(kArmS128Dup, g.DefineAsRegister(node), g.UseRegister(input0),  in VisitS8x16Shuffle()
2752     Emit(kArmS8x16Concat, g.DefineAsRegister(node), g.UseRegister(input0),  in VisitS8x16Shuffle()
2759   Emit(kArmS8x16Shuffle, g.DefineAsRegister(node), src0, src1,  in VisitS8x16Shuffle()
2768   Emit(kArmSxtb, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)),  in VisitSignExtendWord8ToInt32()
2774   Emit(kArmSxth, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)),  in VisitSignExtendWord16ToInt32()